Display panel drive device

• US 20060223254A1
• Filed: 02/27/2006
• Published: 10/05/2006
• Est. Priority Date: 03/30/2005
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: Tada, Gen, Shigeta, Yoshihiro, Kobayashi, Hideto, Shimabukuro, Hiroshi
• Granted Patent: US 7,876,291 B2
• Time in Patent Office: Days
• US Class Current: 438/199
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/293 for address discharge
• CPC Class Codes: G09G 3/296 Driving circuits for producing the waveforms applied to the driving electrodes

Abstract

A display panel drive device of reduced area occupied by circuit elements. The display panel drive device includes an output stage circuit having a low side selector circuit constituted by connecting in series inverters and a buffer circuit, n-channel IGBTs, a Zener diode and resistance respectively connected between the gate and emitter of the IGBT, a buffer circuit, and a high side selector circuit including an inverter. The buffer circuit includes a high side Pch-MOS operated by a logic signal from the high side selector circuit and a low side Nch-MOS operated by a logic signal of the low side selector circuit.

Claims

1. A drive device for driving a display panel, comprising:

an output stage circuit, including an output circuit connected with a scanning electrode of the display panel, and a drive circuit including a selector and shift register for controlling the output circuit,

wherein said output stage circuit is driven by a logic voltage of a low side power source and a logic voltage of a high side power source.

2. The display panel drive device according to claim 1, wherein said drive circuit includes a first drive circuit for low side use and a second drive circuit for high side use, that respectively control the low side and high side of said output circuit,

said first drive circuit for low side use being driven by the logic voltage of the low side power source and said second drive circuit for high side use being driven by the logic voltage of the high side power source.

3. The display panel drive device according to claim 2, wherein said first and second drive circuits are driven by logic voltages of respectively equal magnitudes.

4. The display panel drive device according to claim 2, wherein said first and second drive circuits are integrated circuits driven by logic voltages of 0 V to 5 V.

5. The display panel drive device according to claim 2, wherein one of said first and second drive circuits includes a level shifter circuit for sharing one of a high side logic signal and a low side logic signal.

6. The display panel drive device according to claim 5, wherein said level shifter circuit is constituted by a plurality of P-channel and N-channel MOSFETs gate-controlled by said logic voltages.

7. The display panel drive device according to claim 5, wherein

said level shifter circuit is constituted by first and second P-channel MOSFETs and two N-channel MOSFETs and

the source and substrate of said first P-channel MOSFET are connected with the high side power source, the drain output thereof is connected with the source and substrate of said second P-channel MOSFET, and the drain output thereof is connected with the drains of said two N-channel MOSFETs.

8. The display panel drive device according to claim 7, further comprising in said level shifter circuit,

a first Zener diode between said high side power source and the high side ground potential and

second and third Zener diodes respectively between the drain and source of said first and second P-channel MOSFETs whose substrate and source are connected with the high side power source.

9. A drive device for driving a display panel, comprising:

an output stage circuit, including an output circuit connected with a scanning electrode of the display panel, and a drive circuit including a selector and shift register for controlling the output circuit,

wherein said output stage circuit is driven by a logic voltage of a low side power source and a logic voltage of a high side power source,

wherein one of said first and second drive circuits includes a level shifter circuit for sharing one of a high side logic signal and a low side logic signal, and

wherein said level shifter circuit alternately-turns a high side logic signal ON and OFF at each odd bit or even bit, in synchronization with the clock of the low side logic signal.