METHOD AND STRUCTURE FOR IMPLEMENTING SECURE MULTICHIP MODULES FOR ENCRYPTION APPLICATIONS

• US 20060231633A1
• Filed: 04/14/2005
• Published: 10/19/2006
• Est. Priority Date: 04/14/2005
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Ray, Sudipta K., Frankel, Jason L., Kadakia, Suresh D., Pompeo, Frank L., Fasano, Benjamin V., Farooq, Mukta G., Long, David C., Hamel, Harvey C.
• Granted Patent: US 7,281,667 B2
• Time in Patent Office: Days
• US Class Current: 235/492
• CPC Class Codes: G06K 19/07381 with deactivation or otherwise incapacitation of at least a part of the circuit upon detected tampering
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 23/04 characterised by the shape of the container or parts, e.g. caps, walls
• CPC Class Codes: H01L 23/055 the leads having a passage through the base H01L23/057 takes precedence
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 23/576 using active circuits
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/15192 Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H05K 1/0275 Security details, e.g. tampering prevention or detection
• CPC Class Codes: H05K 1/0306 Inorganic insulating substrates, e.g. ceramic, glass
• CPC Class Codes: H05K 1/144 Stacked arrangements of planar printed circuit boards
• CPC Class Codes: H05K 2201/09263 Meander
• CPC Class Codes: H05K 2201/10151 Sensor

Abstract

A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier, one or more integrated circuit chips attached to the chip carrier, and a cap structure attached to the chip carrier, covering the one or more integrated circuit chips. A conductive grid structure is formed in the chip carrier and cap structure, the conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction. The conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

Claims

1. A tamper resistant, integrated circuit (IC) module, comprising:

a ceramic-based chip carrier;

one or more integrated circuit chips attached to said chip carrier;

a cap structure attached to said chip carrier, and covering said one or more integrated circuit chips; and

a conductive grid structure formed in said chip carrier and said cap structure, said conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction;

wherein said conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

2. The IC module of claim 1, wherein meandering lines formed on one wiring level of said chip carrier are disposed in an offset arrangement with respect to meandering lines formed on an adjacent wiring level of said chip carrier.

3. The IC module of claim 2, wherein said plurality of meandering lines in said x-direction and said y-direction are formed at a selected linewidth and pitch therebetween, such that said offset arrangement results in an effective pitch in said z-direction equal to or less than said selected linewidth.

4. The IC module of claim 1, wherein said meandering lines in said z-direction further comprise jogs formed on one level of said chip carrier coupled to jogs formed on another level of said chip carrier through conductively filled vias.

5. The IC module of claim 1, further comprising a bridge structure configured to detect at least one of an open circuit condition and a short circuit condition in said conductive grid structure.

6. The IC module of claim 5, wherein said plurality of meandering lines in said conductive grid structure are coupled to an associated resistive device so as to limit the amount of discharge of a power source coupled to said conductive grid structure.

7. The IC module of claim 5, wherein said bridge structure configured to detect at least one of a change in resistance and a change in capacitance of said conductive grid structure.

8. The IC module of claim 5, further comprising:

a signal generator configured to provide a time varying input to said bridge structure; and

detection circuitry coupled to said bridge structure, said detection circuitry configured with phase and amplitude sensitivity.

9. The IC module of claim 8, wherein said detection circuitry detects at least one of a change in capacitance and a change in inductance of said conductive grid structure.

10. The IC module of claim 9, wherein said detection circuitry implements at least one of time domain reflectometry (TDR) and time domain transmission (TDT).

11. The IC module of claim 8, further comprising a timer circuit configured to intermittently provide power to said signal generator and said detector circuitry in accordance with a desired duty cycle.

12. The IC module of claim 1, further comprising an electromagnetic interference (EMI) shield surrounding said one or more integrated circuit chips, said EMI shield formed within said chip carrier and said cap structure.

13. The IC module of claim 12, wherein said EMI shield forms a closed path so as to contain energy radiated from said one or more integrated circuit chips.

14. The IC module of claim 1, wherein said cap structure is both mechanically and electrically connected to said chip carrier.

15. A secure cap structure for an integrated circuit (IC) module, comprising:

a metallized, ceramic top portion; and

a footing integrated with said top portion, said footing configured to be attached to a chip carrier of the IC module in a manner so as to surround one or more IC chips attached to the chip carrier when the cap structure is attached to the chip carrier.

16. The cap structure of claim 15, further comprising a plurality of solder fillets disposed along an outer perimeter and an inner perimeter of said footing, said solder fillets configured to provide electrical connection between internal wiring of the cap structure and internal wiring of the chip carrier.

17. The cap structure of claim 16, wherein said plurality of solder fillets on said outer perimeter and said plurality of solder fillets on said inner perimeter are positioned interstitially with respect to one another.

18. The cap structure of claim 16, wherein said solder fillets are formed by selectively metallizing vertical surfaces of said footing.

19. The cap structure of claim 15, wherein said top portion and said footing comprise alumina.

20. A tamper resistant, integrated circuit (IC) module, comprising:

a ceramic-based chip carrier;

one or more integrated circuit chips attached to said chip carrier;

a ceramic-based cap structure attached to said chip carrier, said cap structure including a top portion and a footing integrated thereon, said footing surrounding said one or more IC chips attached to said chip carrier; and

a conductive grid structure formed in said chip carrier and said cap structure, said conductive grid structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction;

wherein said conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

21. The IC module of claim 20, wherein meandering lines formed on one wiring level of said chip carrier are disposed in an offset arrangement with respect to meandering lines formed on an adjacent wiring level of said chip carrier.

22. The IC module of claim 21, wherein said plurality of meandering lines in said x-direction and said y-direction are formed at a selected linewidth and pitch therebetween, such that said offset arrangement results in an effective pitch in said z-direction equal to or less than said selected linewidth.

23. The IC module of claim 20, wherein said meandering lines in said z-direction further comprise jogs formed on one level of said chip carrier coupled to jogs formed on another level of said chip carrier through conductively filled vias.

24. The IC module of claim 20, further comprising a bridge structure configured to detect at least one of an open circuit condition and a short circuit condition in said conductive grid structure.

25. The IC module of claim 24, wherein said plurality of meandering lines in said conductive grid structure are coupled to an associated resistive device so as to limit the amount of discharge of a power source coupled to said conductive grid structure.

26. The IC module of claim 24, wherein said bridge structure configured to detect at least one of a change in resistance and a change in capacitance of said conductive grid structure.

27. The IC module of claim 24, further comprising:

a signal generator configured to provide a time varying input to said bridge structure; and

detection circuitry coupled to said bridge structure, said detection circuitry configured with phase and amplitude sensitivity.

28. The IC module of claim 27, wherein said detection circuitry detects at least one of a change in capacitance and a change in inductance of said conductive grid structure.

29. The IC module of claim 28, wherein said detection circuitry implements at least one of time domain reflectometry (TDR) and time domain transmission (TDT).

30. The IC module of claim 27, further comprising a timer circuit configured to intermittently provide power to said signal generator and said detector circuitry in accordance with a desired duty cycle.

31. The IC module of claim 20, further comprising an electromagnetic interference (EMI) shield surrounding said one or more integrated circuit chips, said EMI shield formed within said chip carrier and said cap structure.

32. The IC module of claim 31, wherein said EMI shield forms a closed path so as to contain energy radiated from said one or more integrated circuit chips.

33. The IC module of claim 20, wherein said cap structure is both mechanically and electrically connected to said chip carrier.

34. The IC module of claim 20, further comprising a plurality of solder fillets disposed along an outer perimeter and an inner perimeter of said footing, said solder fillets configured to provide electrical connection between internal wiring of the cap structure and internal wiring of said chip carrier.

35. The IC module of claim 30, wherein said plurality of solder fillets on said outer perimeter and said plurality of solder fillets on said inner perimeter are positioned interstitially with respect to one another.

36. A method for implementing a tamper resistant, integrated circuit (IC) module, the IC module including a ceramic-based chip carrier, one or more integrated circuit chips attached to the chip carrier, and a ceramic-based cap structure attached to the chip carrier, the method comprising:

forming a conductive grid structure within in the chip carrier and the cap structure, said conductive grid structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction;

wherein said conductive grid structure is configured to determine an attempt to penetrate the IC module by detecting at least one of a change in resistance and a change in capacitance of said conductive grid structure.

37. The method of claim 36, further comprising adhering the cap structure to the chip carrier with a polymeric adhesive layer between a footing of the cap structure and the chip carrier, wherein said footing surrounds the one or more IC chips attached to the chip carrier.

38. The method of claim 37, further comprising:

forming a plurality of solder fillets along an outer perimeter and an inner perimeter of said footing, said solder fillets configured to provide electrical connection between internal wiring of the cap structure and internal wiring of the chip carrier;

wherein said plurality of solder fillets on said outer perimeter and said plurality of solder fillets on said inner perimeter are positioned interstitially with respect to one another.