Level Shifting and Logic Circuit

• US 20060232526A1
• Filed: 05/12/2006
• Published: 10/19/2006
• Est. Priority Date: 05/20/2003
• Status: Abandoned Application

• Current Assignee: Syndiant Incorporated
• Original Assignee: Kagutech Ltd.
• Inventors: Guitag, Alvin, Guttag, Karl M.
• Application Number:
  US11/383,039
• Publication Number:
  US 20060232526A1
• Time in Patent Office: Days
• US Class Current: 345/84
• CPC Class Codes: G06F 3/147 using display panels
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2310/0221 with use of split matrices G09G3/3644 and G09G3/3666 take precedence
• CPC Class Codes: G09G 2310/0275 Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/34 by control of light from an independent source
• CPC Class Codes: G09G 3/346 based on modulation of the reflection angle, e.g. micromirrors micromirrors devices per se G02B26/0833
• CPC Class Codes: G09G 5/10 Intensity circuits

Abstract

The present invention provides a various methods, systems and devices for controlling light modulating elements and/or spatial light modulators. In some embodiments of the present invention, a recursive feedback method is used to control light modulating elements and/or spatial light modulators.

Claims

1-130. -130. (canceled)

131. A device comprising:

a voltage level shifting circuit for voltage level shifting of an output voltage;

a logic circuit for controlling a selectable logic function based on a memory bit; and

means for controlling one or more light modulating elements using said output voltage of said voltage level shifting circuit.

132. The device of claim 131, wherein said means for voltage level shifting is capable of outputting a voltage higher than a voltage on said memory bit.

133. The device of claim 131, wherein said selectable logic function selects whether a bit is inverted or not.

134. The device of claim 131, wherein said selectable logic function forces an output of said array of circuits high or low.

135. The device of claim 131, wherein said device uses at least 2 cross-coupled P-channel transistors to pull up said array of circuits to a voltage level such that one P-channel transistor is off when the other P-channel transistor is on.

136. The device of claim 135, further comprising a plurality of N-channel transistors connected to each of said P-channel transistors for pulling down no more than one of said P-channel transistors at one time.

137. The device of claim 135, further comprising a plurality of nodes that are either driven to low or allowed to float, wherein when one of said nodes is driven to ground thereby causing one of said P-channel transistors to be pulled to ground thus turning on a gate of said other P-channel transistor.

138. The device of claim 137, wherein corresponding nodes of said plurality of nodes of a subset of said array of circuits are electrically connected.

139. The device of claim 138, wherein a sequence of writing values to said memory bit and sensing one or more of said corresponding nodes include means for testing the functionality of said means for voltage level shifting and/or said memory bit.

140. The device of claim 131, wherein said array of circuits is an inherently testable array of circuits.

141. The device of claim 140, wherein said nodes must be sensed in order to test said array of circuits.

169. The device of claim 131, wherein the output voltage is higher than the voltage of the logic circuitry.

142-168. -168. (canceled)