Active-matrix display panel

• US 20060232738A1
• Filed: 11/23/2005
• Published: 10/19/2006
• Est. Priority Date: 04/19/2005
• Status: Abandoned Application

• Current Assignee: Prime View International Company Limited (E Ink Holdings Incorporated)
• Original Assignee: Prime View International Company Limited (E Ink Holdings Incorporated)
• Inventors: Teng, Yu-Chun, Liu, Chuan-Feng, Hsu, Yu-Chen, Lin, Tung-Liang, Kuo, Chia-Hao
• Application Number:
  US11/285,956
• Publication Number:
  US 20060232738A1
• Time in Patent Office: Days
• US Class Current: 349/149
• CPC Class Codes: G02F 1/1345 Conductors connecting electrodes to cell terminals
• CPC Class Codes: G02F 1/13629 Multilayer wirings

Abstract

An active-matrix display panel including a display area, a peripheral region and a fanout circuitry is provided. The peripheral region is connected with at least one side of the display area. The fanout circuitry is arranged on the peripheral region and is a multi-layered routing structure. By using the multi-layered routing structure aforementioned, the layout flexibility is improved significantly.

Claims

1. An active-matrix display panel, including:

a display area;

a peripheral region connected with at least one side of the display area; and

a first fanout circuitry disposed on the peripheral region, wherein the first fanout circuitry is a multi-layered routing structure.

2. The active-matrix display panel of claim 1, further comprising a first driving circuit disposed on the peripheral region, and is electrically connected with the first fanout circuitry.

3. The active-matrix display panel of claim 2, wherein the driving circuit is a driver integrated circuit (driver IC) bonded on the peripheral region.

4. The active-matrix display panel of claim 2, further comprising an external circuitry electrically connected with the first driving circuit.

5. The active-matrix display panel of claim 4, further comprising a control circuit interface electrically connected with the external circuitry.

6. The active-matrix display panel of claim 1, wherein the first fanout circuitry

a plurality of conductive routing layers;

and

a plurality of dielectric layers, wherein the conductive routing layers and the dielectric layers are stacked on the peripheral region alternately.

7. The active-matrix display panel of claim 6, wherein each conductive routing layer comprises a plurality of traces, while two adjacent traces of said first fanout circuitry are located on two different circuit layers.

8. The active-matrix display panel of claim 2, further comprising a second fanout circuitry disposed on the peripheral region.

9. The active-matrix display panel of claim 8, further comprising a second driving circuit disposed on the peripheral region, and is electrically connected with said second fanout circuitry.

10. The active-matrix display panel of claim 9, wherein said first driving circuit is a gate driver and said second driving circuit is a source driver.

11. The active-matrix display panel of claim 9, wherein said first driving circuit is a source driver and said second driving circuit is a gate driver.

12. The active-matrix display panel of claim 8, wherein said second fanout circuitry is a multi-layered routing structure.