MTJ read head with sidewall spacers

• US 20060234445A1
• Filed: 04/14/2005
• Published: 10/19/2006
• Est. Priority Date: 04/14/2005
• Status: Active Application

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Applied Spintronics, Inc., Headway Technologies Incorporated
• Inventors: Yang, Lin
• Granted Patent: US 7,241,632 B2
• Time in Patent Office: Days
• US Class Current: 438/257
• CPC Class Codes: H10N 50/01 Manufacture or treatment

Abstract

Following CMP, a magnetic tunnel junction stack may protrude through the oxide that surrounds it, making it susceptible to possible shorting to its sidewalls. The present invention overcomes this problem by depositing silicon nitride spacers on these sidewalls prior to oxide deposition and CMP. So, even though the stack may protrude through the top surface of the oxide after CMP, the spacers serve to prevent possible later shorting to the stack.

Claims

1. A process to manufacture a magnetic tunnel junction stack that is free of shorting problems that arise from MTJ cap protrusion after CMP, comprising:

forming a magnetic tunnel junction stack, having sidewalls and a cap layer, on a substrate;

using a first conformal deposition method, depositing a layer of silicon nitride on said stack and on said substrate;

anisotropically etching said layer of silicon nitride until said cap layer is fully exposed, thereby forming spacers on said MTJ sidewalls;

using a second conformal deposition method, depositing a layer of silicon oxide, having a surface, on all exposed surfaces to form a structure; and

by means of a CMP process that selectively removes silicon oxide at a faster rate than silicon nitride and tantalum, planarizing said structure until said cap layer and spacers protrude above said silicon oxide surface.

2. The process described in claim 1 wherein said first conformal deposition method further comprises using LPCVD from a BTBAS source with a BTBAS flow rate in the range of 40 to 100 sccm, an ammonia to BTBAS ratio between 2:

1 to 8;

1, and a total pressure of between 300 and 500 mT.

3. The process described in claim 1 wherein said second conformal deposition method further comprises using PECVD from a TEOS source, at a temperature between about 200°

C. and 500°

C.

4. The process described in claim 1 wherein said anisotropic etching method for silicon nitride further comprises using Ar/CF₄/CHF₃/O₂ at a flow of 90/45/10/10 sccm respectively at 400W of power and a pressure of 50 mT.

5. The process described in claim 1 wherein said CMP process further comprises:

using a high selectivity slurry containing an abrasive selected from the group consisting of ceria and silica at a pH between about 9 and 11;

using a polyurethane type pad;

using a slurry flow rate in the range of 150 to 250 ml/min; and

using a polishing pressure of 2 to 4 psi, a pad conditioning force of 6 to 8 pounds, and a platen speed of 30 to 50 rpm.

6. The process described in claim 1 wherein, after CMP, said cap protrudes between about 200 and 400 Angstroms above the silicon surface.

7. A process to manufacture a magnetic tunnel junction stack that is free of shorting problems that arise from MTJ cap protrusion after CMP, comprising:

forming a magnetic tunnel junction stack, having sidewalls and a cap layer, on a substrate;

using a first conformal deposition method, depositing a layer of silicon nitride on said stack and on said substrate;

using a second conformal deposition method, depositing a first layer of silicon oxide on said layer of silicon nitride;

anisotropically etching said first layer of silicon oxide until said layer of silicon nitride is reached, thereby forming spacers on vertical portions of said layer of silicon nitride;

then, using said silicon oxide spacers as a hard mask, selectively removing all exposed silicon nitride thereby forming said silicon nitride layer into opposing L-shaped spacers on said MTJ sidewalls;

using said second conformal deposition method, depositing a second layer of silicon oxide, having a surface, on all exposed surfaces to form a structure; and

by means of a CMP process that selectively removes silicon oxide at a faster rate than silicon nitride and tantalum, planarizing said structure until said cap layer and L-shaped spacers protrude above said silicon oxide surface.

8. The process described in claim 7 wherein said first conformal deposition method further comprises using LPCVD from a BTBAS source with a BTBAS flow rate in the range of 40 to 100 sccm, an ammonia to BTBAS ratio between 2:

1 to 8;

1, and a total pressure of between 300 and 500 mT.

9. The process described in claim 7 wherein said second conformal deposition method further comprises using PECVD from a TEOS source, at a temperature between about 200°

C. and 500°

C.

10. The process described in claim 7 wherein said anisotropic etching method for silicon oxide further comprises using Ar/CF₄/CHF₃ at flow rates of 65/10/35 sccm respectively at a 375 W power level and a pressure of 200 mT.

11. The process described in claim 7 wherein said CMP process further comprises:

using a high selectivity slurry containing an abrasive selected from the group consisting of ceria and silica at a pH between about 9 and 11;

using a polyurethane type pad;

using a slurry flow rate in the range of 150 to 250 ml/min; and

using a polishing pressure of 2 to 4 psi, a pad conditioning force of 6 to 8 pounds, and a platen speed of 30 to 50 rpm.

12. The process described in claim 7 wherein, after CMP, said cap protrudes between about 200 and 400 Angstroms above the silicon oxide surface.

13. A magnetic tunnel junction stack having a cap with sidewalls and a top surface, comprising:

a layer of silicon oxide, having a top surface, surrounding said stack;

said cap protruding a distance above said silicon oxide top surface;

silicon nitride spacers that surround said cap, located between said sidewalls and said silicon oxide layer, said spacers being in contact with both the cap and the silicon oxide;

said spacers having a thickness that increases from zero at said cap top surface to a maximum of about 0.1 microns where it is below said silicon oxide top surface; and

whereby said silicon nitride spacers prevent shorting to said cap layer during operation of said magnetic tunnel junction stack.

14. The magnetic tunnel junction stack described in claim 13 wherein said layer of silicon oxide has a thickness between about 600 and 1,000 Angstroms.

15. The magnetic tunnel junction stack described in claim 13 wherein said cap top surface is between about 200 and 400 Angstroms above said silicon oxide top surface.

16. A magnetic tunnel junction stack having a cap with sidewalls and a top surface, comprising:

a layer of silicon oxide, having a top surface, surrounding said stack;

said cap protruding a distance above said silicon oxide top surface;

silicon nitride spacers that surround said cap, located between said sidewalls and said silicon oxide layer, said spacers being in contact with all of said sidewalls and with the silicon oxide;

said spacers having a uniform thickness of between about 500 and 1,000 Angstroms; and

whereby said silicon nitride spacers prevent shorting to said cap layer during operation of said magnetic tunnel junction stack.

17. The magnetic tunnel junction stack described in claim 16 wherein said layer of silicon oxide has a thickness between about 600 and 1,000 Angstroms.

18. The magnetic tunnel junction stack described in claim 16 wherein said cap top surface is between about 200 and 400 Angstroms above said silicon oxide top surface.