Programmable logic device including programmable interface core and central processing unit
First Claim
1. A system comprising a programmable logic device having an embedded microprocessor, wherein the programmable logic device comprises:
- a programmable interface coupled to the microprocessor, wherein the programmable interface includes a core designated by a user; and
a first device for one of providing information to and receiving information from the microprocessor via the programmable interface.
1 Assignment
0 Petitions
Accused Products
Abstract
A programmable logic device (PLD) includes a central processing unit (CPU) and a programmable interface coupled to the CPU, wherein the programmable interface includes a core designated by a user. The programmable interface core allows devices, both on and off-chip, to communicate with the CPU. In one embodiment, the programmable interface core includes a crosspoint switch for coupling a plurality of devices and the CPU. Re-programmability of the PLD provides significant flexibility in providing features that can be parameterized based on the user'"'"'s needs and/or associated design. Specifically, these parameterized features can be implemented in programmable resources on the PLD, thereby allowing these features to be modified at any time. Moreover, only those resources actually needed for the programmable interface core need be implemented, thereby allowing the user to optimize use of the remainder of the PLD. Finally, the functions of the processor local bus can be efficiently limited, thereby allowing the PLD to approach the performance level of an ASIC.
128 Citations
20 Claims
-
1. A system comprising a programmable logic device having an embedded microprocessor, wherein the programmable logic device comprises:
-
a programmable interface coupled to the microprocessor, wherein the programmable interface includes a core designated by a user; and
a first device for one of providing information to and receiving information from the microprocessor via the programmable interface. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
-
-
17. A method for generating a configuration bitstream for a programmable logic device (PLD), the method comprising:
-
activating a core generator;
selecting a programmable interface core using the core generator; and
providing the programmable interface core to a PLD software tool that generates the configuration bitstream. - View Dependent Claims (18, 19, 20)
-
Specification