Simple matrix addressing in a display
First Claim
1. An addressing mechanism, comprising:
- a first set of parallel, co-planar conductive control lines;
a second set of parallel, co-planar conductive control lines, wherein said second set of conductive control lines are spaced apart in relation to said first set of conductive control lines, wherein a plane of said second set of conductive control lines is parallel to a plane of said first set of conductive control lines, wherein control lines of said second set of conductive control lines are perpendicular to control lines of said first set of conductive control lines;
a first select mechanism configured to selectively apply an in-line impedance to a control line of said first set of conductive control lines; and
a second select mechanism configured to selectively apply a drive voltage to each conductive line of said second set of conductive lines.
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Accused Products
Abstract
An addressing mechanism for charging and discharging quasi-capacitive elements in an X-Y matrix. The addressing mechanism may be configured to toggle a resistor-capacitor (RC) time constant between large and small values such as by opening or closing a circuit path to a low impedance resistor disposed in parallel with a higher impedance in-line resistor. When this occurs, elements in the X-Y matrix can be addressed and controlled. The X-Y matrix may be comprised of multiple “rows” and “columns” of conductors where crosstalk may occur along the columns and rows. Crosstalk may be curtailed by using either hysteresis management or global control of the row'"'"'s impedance along its entire length. The resulting control obviates the need for active devices at each matrix element to perform the switching functions.
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Citations
39 Claims
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1. An addressing mechanism, comprising:
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a first set of parallel, co-planar conductive control lines;
a second set of parallel, co-planar conductive control lines, wherein said second set of conductive control lines are spaced apart in relation to said first set of conductive control lines, wherein a plane of said second set of conductive control lines is parallel to a plane of said first set of conductive control lines, wherein control lines of said second set of conductive control lines are perpendicular to control lines of said first set of conductive control lines;
a first select mechanism configured to selectively apply an in-line impedance to a control line of said first set of conductive control lines; and
a second select mechanism configured to selectively apply a drive voltage to each conductive line of said second set of conductive lines. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A display, comprising:
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a first set of parallel, co-planar conductive control lines;
a second set of parallel, co-planar conductive control lines, wherein said second set of conductive control lines are spaced apart in relation to said first set of conductive control lines, wherein a plane of said second set of conductive control lines is parallel to a plane of said first set of conductive control lines, wherein control lines of said second set of conductive control lines are perpendicular to control lines of said first set of conductive control lines;
a matrix of pixels overlapping between said first set of parallel, co-planar conductive control lines and said second set of parallel, co-planar conductive control lines;
a first select mechanism coupled to said matrix of pixels, wherein said first select mechanism is configured to selectively apply an in-line impedance to a control line of said first set of conductive control lines; and
a second select mechanism coupled to said matrix of pixels, wherein said second select mechanism is configured to selectively apply a drive voltage to each conductive line of said second set of conductive lines. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A system, comprising:
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a processor;
a memory unit;
an input mechanism;
a display; and
a bus system for coupling the processor to the memory unit, input mechanism and display;
wherein said display comprises;
a first set of parallel, co-planar conductive control lines;
a second set of parallel, co-planar conductive control lines, wherein said second set of conductive control lines are spaced apart in relation to said first set of conductive control lines, wherein a plane of said second set of conductive control lines is parallel to a plane of said first set of conductive control lines, wherein control lines of said second set of conductive control lines are perpendicular to control lines of said first set of conductive control lines;
a matrix of pixels overlapping between said first set of parallel, co-planar conductive control lines and said second set of parallel, co-planar conductive control lines;
a first select mechanism coupled to said matrix of pixels, wherein said first select mechanism is configured to selectively apply an in-line impedance to a control line of said first set of conductive control lines; and
a second select mechanism coupled to said matrix of pixels, wherein said second select mechanism is configured to selectively apply a drive voltage to each conductive line of said second set of conductive lines. - View Dependent Claims (28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39)
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Specification