DC offset detection and cancellation in a receiver

• US 20060239388A1
• Filed: 04/26/2005
• Published: 10/26/2006
• Est. Priority Date: 04/26/2005
• Status: Active Grant

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Skyworks Solutions Incorporated
• Inventors: Beamish, Norman J.
• Granted Patent: US 7,583,765 B2
• Time in Patent Office: Days
• US Class Current: 375/346
• CPC Class Codes: H03D 3/008 Compensating DC offsets
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

A DC offset detection and cancellation system for a receiver is disclosed. The DC offset detection and cancellation system comprises a downconverter configured to downconvert a received signal to a baseband level signal, the downconverted signal having a first sampling rate, a filter system configured to filter the downconverted received signal at the first sampling rate, and estimator logic configured to sample the downconverted received signal at the first sampling rate to develop a DC estimate signal representative of any direct current (DC) component present on the downconverted received signal, the filter system configured to develop a second sampling rate, where the first sampling rate is significantly higher than the second sampling rate.

Claims

1. A method for detecting and canceling DC offset in a receiver, comprising:

downconverting a received signal to a baseband level signal, the downconverted signal having a first sampling rate;

providing the downconverted received signal to a filter system configured to operate at the first sampling rate;

sampling the downconverted received signal at the first sampling rate to develop a DC estimate signal representative of any direct current (DC) component present on the downconverted received signal; and

filtering the downconverted received signal to develop a second sampling rate, where the first sampling rate is significantly higher than the second sampling rate.

2. The method of claim 1, further comprising developing the DC estimate signal in the digital domain.

3. The method of claim 2, further comprising applying the DC estimate signal in the digital domain to cancel any DC component present on the downconverted received signal.

4. The method of claim 2, further comprising converting the DC estimate signal to an analog signal.

5. The method of claim 4, further comprising subtracting the analog estimate of the DC component from the downconverted received signal to minimize any DC component on the downconverted received signal.

6. The method of claim 2, further comprising sampling the downconverted received signal at 26 megahertz (MHz).

7. The method of claim 1, further comprising:

developing the DC estimate signal in the digital domain;

converting the DC estimate signal to an analog signal;

applying the analog DC estimate signal to cancel any DC component present on the downconverted received signal; and

applying the DC estimate signal in the digital domain to cancel any residual DC component present on the downconverted received signal.

8. A DC offset detection and cancellation system for a receiver, comprising:

a downconverter configured to downconvert a received signal to a baseband level signal, the downconverted signal having a first sampling rate;

a filter system configured to filter the downconverted received signal at the first sampling rate; and

estimator logic configured to sample the downconverted received signal at the first sampling rate to develop a DC estimate signal representative of any direct current (DC) component present on the downconverted received signal, the filter system configured to develop a second sampling rate, where the first sampling rate is significantly higher than the second sampling rate.

9. The DC offset detection and cancellation system of claim 8, wherein the DC estimate signal is developed in the digital domain.

10. The DC offset detection and cancellation system of claim 9, wherein the DC estimate signal is applied in the digital domain to cancel any DC component present on the downconverted received signal.

11. The DC offset detection and cancellation system of claim 9, further comprising a digital-to-analog converter configured to convert the estimated DC component to an analog signal.

12. The DC offset detection and cancellation system of claim 11, further comprising a subtractor configured to subtract the analog estimate of the DC component to the downconverted received signal to minimize any DC component on the downconverted received signal.

13. The DC offset detection and cancellation system of claim 9, wherein the downconverted received signal is sampled at 26 megahertz (MHz).

14. The DC offset detection and cancellation system of claim 8, further comprising:

logic configured to develop the DC estimate signal in the digital domain;

a digital-to-analog converter configured to convert the DC estimate signal to an analog signal;

a first subtractor configured to apply the analog DC estimate signal to cancel any DC component present on the downconverted received signal; and

a second subtractor configured to apply the DC estimate signal in the digital domain to cancel any residual DC component present on the downconverted received signal.

15. A portable transceiver, comprising:

a transmitter configured to modulate and transmit a data signal;

a receiver configured to receive a received signal, the receiver comprising;

a downconverter configured to downconvert a received signal to a baseband level signal, the downconverted signal having a first sampling rate;

a filter system configured to filter the downconverted received signal at the first sampling rate; and

estimator logic configured to sample the downconverted received signal at the first sampling rate to develop a DC estimate signal representative of any direct current (DC) component present on the downconverted received signal, the filter system configured to develop a second sampling rate, where the first sampling rate is significantly higher than the second sampling rate.

16. The portable transceiver of claim 15, wherein the DC estimate signal is developed in the digital domain.

17. The portable transceiver of claim 16, wherein the DC estimate signal is applied in the digital domain to cancel any DC component present on the downconverted received signal.

18. The portable transceiver of claim 16, further comprising a digital-to-analog converter configured to convert the estimated DC component to an analog signal.

19. The portable transceiver of claim 18, further comprising a subtractor configured to subtract the analog estimate of the DC component to the downconverted received signal to minimize any DC component on the downconverted received signal.

20. The portable transceiver of claim 16, wherein the downconverted received signal is sampled at 26 megahertz (MHz).

21. The portable transceiver of claim 15, further comprising:

logic configured to develop the DC estimate signal in the digital domain;

a digital-to-analog converter configured to convert the DC estimate signal to an analog signal;

a first subtractor configured to apply the analog DC estimate signal to cancel any DC component present on the downconverted received signal; and

a second subtractor configured to apply the DC estimate signal in the digital domain to cancel any residual DC component present on the downconverted received signal.

22. A portable transceiver, comprising:

means for modulating and transmitting a data signal;

means for downconverting a received signal to a baseband level signal, the downconverted signal having a first sampling rate;

means for providing the downconverted received signal to a filter system configured to operate at the first sampling rate;

means for sampling the downconverted received signal at the first sampling rate to develop a DC estimate signal representative of any direct current (DC) component present on the downconverted received signal; and

means for filtering the downconverted received signal to develop a second sampling rate, where the first sampling rate is significantly higher than the second sampling rate.

23. The portable transceiver of claim 22, further comprising means for developing the DC estimate signal in the digital domain.

24. The portable transceiver of claim 23, further comprising means for applying the DC estimate signal in the digital domain to cancel any DC component present on the downconverted received signal.

25. The portable transceiver of claim 23, further comprising means for converting the estimated DC component to an analog signal.

26. The portable transceiver of claim 25, further comprising means for subtracting the analog estimate of the DC component to the downconverted received signal to minimize any DC component on the downconverted received signal.

27. The portable transceiver of claim 23, further comprising means for sampling the downconverted received signal at 26 megahertz (MHz) at a bit rate of 7488 samples per second.

28. The portable transceiver of claim 22, further comprising:

means for developing the DC estimate signal in the digital domain;

means for converting the DC estimate signal to an analog signal;

means for applying the analog DC estimate signal to cancel any DC component present on the downconverted received signal; and

means for applying the DC estimate signal in the digital domain to cancel any residual DC component present on the downconverted received signal.