Semiconductor memory device

• US 20060242425A1
• Filed: 04/20/2006
• Published: 10/26/2006
• Est. Priority Date: 04/21/2005
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Ishida, Terufumi
• Granted Patent: US 7,360,049 B2
• Time in Patent Office: Days
• US Class Current: 713/183
• CPC Class Codes: G06F 12/1433 for a module or a part of a module
• CPC Class Codes: G06F 21/79 in semiconductor storage media, e.g. directly-addressable memories

Abstract

In a nonvolatile semiconductor memory device according to the present invention, a password protection function is enabled or disabled based on a first specified value M and a second state specified value P such that when both of the first specified value M and the second state specified value P are in a set state, the password protection function is enabled and when at least the second specified value P is in a reset state, the password protection function is disabled, and the first state specified value M maintains a previous state and the second state specified value P follows the state of the first state specified value M in response to a reset operation, and the cancel operation to shift the second state specified value P to the reset state can be performed only when the password is inputted correctly.

Claims

1. A nonvolatile semiconductor memory device comprising:

at least one memory block made of a plurality of nonvolatile memory cells; and

a password protection function in which data cannot be read out from a part of the memory block or the entire memory block without a cancel operation using a password, wherein

the password protection function is enabled or disabled based on a first and second state specified values such that when both of the first and second state specified values are in a set state, the password protection function is enabled and when at least the second specified value is in a reset state, the password protection function is disabled, and

the first state specified value maintains a previous state and the second state specified value follows the state of the first state specified value in response to a predetermined operation of the nonvolatile semiconductor memory device, and

the cancel operation to shift the second state specified value to the reset state can be performed only when the password is inputted correctly.

2. The nonvolatile semiconductor memory device according to claim 1, wherein the predetermined operation is a reset operation at the time of turning on a power supply or inputting a reset signal.

3. The nonvolatile semiconductor memory device according to claim 1, wherein the second state specified value is changed to the set state following the first state specified value when the first state specified value is changed from the reset state to the set state.

4. The nonvolatile semiconductor memory device according to claim 1 further comprising:

a nonvolatile first state specified value memory circuit in which the first state specified value is stored; and

a volatile second state specified value memory circuit in which the second state specified value is stored.

5. The nonvolatile semiconductor memory device according to claim 1 further comprising:

a nonvolatile password memory circuit in which a verifying password for the password is previously stored; and

a volatile password register in which the verifying password transferred from the password memory circuit is stored after the power supply is turned on.

6. The nonvolatile semiconductor memory device according to claim 1, wherein

a state specified by the first state specified value and the second state specified value comprises

a password protection state in which both of the first state specified value and the second state specified value are in the set state so that the password protection function is enabled,

a password cancel state in which the first state specified value is in the set state and the second state specified value is in the reset state, and

a normal state when both of the first state specified value and the second state specified value are in the reset state, and

the state can be shifted from the normal state to the password protection state, from the password protection state to the password cancel state, and from the password cancel state to the password protection state or the normal state.

7. The nonvolatile semiconductor memory device according to claim 6, wherein the normal state is set as an initial state before shipment.

8. The nonvolatile semiconductor memory device according to claim 6, wherein both of the first state specified value and the second state specified value are changed from the reset state to the set state when a predetermined password protection enabling command for shifting the normal state to the password protection state is inputted in the normal state.

9. The nonvolatile semiconductor memory device according to claim 6, wherein the normal state is maintained when a command other than the password protection enabling command is inputted in the normal state, a power supply reset occurs, or a reset signal is inputted.

10. The nonvolatile semiconductor memory device according to claim 6, wherein the second state specified value is reset from the set state to the reset state when a predetermined password cancel command for shifting the password protection state to the password cancel state is inputted in the password protection state.

11. The nonvolatile semiconductor memory device according to claim 10, wherein the password cancel command comprises a plurality of bits and contains the password therein.

12. The nonvolatile semiconductor memory device according to claim 11, wherein the second state specified value is reset from the set state to the reset state and the state is shifted to the password cancel state when the password cancel command is inputted in the password protection state and the password contained in the password cancel command coincides with the predetermined verifying password.

13. The nonvolatile semiconductor memory device according to claim 12, wherein the second state specified value is not reset from the set state to the reset state and the password protection state is maintained when the password cancel command is inputted in the password protection state and the password contained in the password cancel command does not coincide with the predetermined verifying password.

14. The nonvolatile semiconductor memory device according to claim 10, wherein the second state specified value is not reset from the set state to the reset state and the password protection state is maintained when the command other than the password cancel command is inputted in the password protection state, the power supply reset occurs, or the reset signal is inputted.

15. The nonvolatile semiconductor memory device according to claim 6, wherein the first state specified value is changed from the reset state to the set state when the predetermined protection cancel command for shifting the password cancel state to the normal state is inputted.

16. The nonvolatile semiconductor memory device according to claim 6, wherein the second state specified value is changed from the reset state to the set state and the state is shifted to the password protection state when the power supply reset occurs or the reset signal is inputted in the password cancel state.

17. The nonvolatile semiconductor memory device according to claim 1 further comprising:

a first nonvolatile flag memory circuit in which a data protection flag for inhibiting writing and erasing to and from the memory block in units of the memory block is stored; and

a second nonvolatile flag memory circuit in which a permanent data protection flag for permanently inhibiting writing and erasing to and from the memory block in units of the memory block is stored, wherein

data stored in the memory block for which the permanent data protection flag is set is permanently protected from writing and erasing and can be read out regardless of the state of the data protection flag.

18. The nonvolatile semiconductor memory device according to claim 17, wherein data can be read out from only the memory block for which the permanent data protection flag is set when the password protection function is enabled.

19. The nonvolatile semiconductor memory device according to claim 18, wherein a setting operation of the permanent data protection flag can be only performed when at least the second state specified value is in the reset state.

20. The nonvolatile semiconductor memory device according to claim 18, wherein the permanent data protection flag is set for one memory bock selected as a boot-block in the memory blocks.