Method of fabricating vertical structure LEDs

• US 20060244001A1
• Filed: 01/07/2005
• Published: 11/02/2006
• Est. Priority Date: 04/09/2002
• Status: Active Grant

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: Yoo, Myung Cheol, Jeong, In-Kwon, Lee, Jong-Lam
• Granted Patent: US 7,588,952 B2
• Time in Patent Office: Days
• US Class Current: 257/103
• CPC Class Codes: H01C 7/006 Thin film resistors
• CPC Class Codes: H01C 7/008 Thermistors H01C7/02 - H01C7/06 take precedence
• CPC Class Codes: H01L 27/0802 Resistors only
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 33/0025 comprising only AIIIBV compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/36 characterised by the electrodes
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/40 Materials therefor
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: Y10S 438/958 Passivation layer
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.

Claims

1. A light-emitting device, comprising:

a metal layer;

a GaN contact layer adjacent the metal layer;

a GaN buffer layer;

a light-emitting layer disposed between the GaN contact layer and the GaN buffer layer; and

an ohmic contact on the GaN buffer layer.

2. The light-emitting device according to claim 1, further including a metallic pad over the ohmic contact.

3. The light-emitting device according to claim 1, further including a passivation layer over surfaces of the GaN contact layer, of the light emitting layer, and of the GaN buffer layer.

4. The light-emitting device according to claim 3, wherein the passivation layer extends over part of the ohmic contact.

5. The light-emitting device according to claim 3, wherein the passivation layer includes a material selected from a group consisting of SiO₂ and Si₃N₄.

6. The light-emitting device according to claim 1, wherein the light emitting layer includes Ga.

7. The light-emitting device according to claim 1, wherein the GaN contact layer is doped.

8. The light-emitting device according to claim 1, wherein the metal layer includes a metal selected from a group consisting of Cu, Cr, Ni, Au, Ag, Mo, Pt, Pd, NV, and Al.

9. The light-emitting device according to claim 1, wherein the metal layer includes titanium nitride.

10. A method of producing semiconductor devices, comprising:

growing a plurality of semiconductor layers on an insulating substrate;

forming first ohmic contacts on the plurality of semiconductor layers;

forming a metal support layer over the first ohmic contacts;

removing the insulating substrate; and

forming second ohmic contacts on the plurality of semiconductor layers.

11. A method of producing semiconductor devices according to claim 10, further including the step of forming trenches through the plurality of semiconductor layers, wherein the trenches define a plurality of individual semiconductor devices.

12. A method of producing semiconductor devices according to claim 11, wherein the trenches extend into the insulating substrate.

13. A method of producing semiconductor devices according to claim 11, further including the step of filling the trenches to form posts.

14. A method of producing semiconductor devices according to claim 13, wherein the metal support layer extends over the posts.

15. The method of claim 10, further including passivating the plurality of semiconductor layers after the insulating substrate is removed.

16. The method of claim 15, wherein passivation is performed after the second ohmic contacts are formed.

17. The method of claim 10, further including forming metal pads on the second ohmic contacts.

18. The method of claim 10, further including separating out individual semiconductor devices.

19. The method of claim 18, wherein separating out individual semiconductor devices includes etching through the metal support layer.

20. The method of claim 18, wherein separating out individual semiconductor devices includes sawing through the metal support layer.

21. The method of claim 20, wherein sawing through the metal support layer is performed at a temperature less than 0°

C.

22. The method of claim 10, wherein forming trenches is performed using inductively coupled plasma reactive ion etching (ICP RIE).

23. The method of claim 10, wherein removing the insulative substrate is performed using a laser lift off procedure.

24. The method of claim 23, wherein the laser lift off procedure includes radiating laser light through the insulative substrate.

25. A method of fabricating light emitting diodes, comprising:

forming a GaN buffer layer on a sapphire substrate;

forming an active layer on the GaN buffer layer;

forming a GaN contact layer on the active layer;

identifying the location of a plurality of individual light emitting diodes;

forming a first ohmic contact on each individual light emitting diode;

forming a metal support structure over the first ohmic contacts;

removing the sapphire substrate; and

forming a second ohmic contact on each individual light emitting diode.

26. A method of producing semiconductor devices according to claim 25, further including the step of forming trenches through the plurality of semiconductor layers and between individual semiconductor devices.

27. A method of producing semiconductor devices according to claim 26, wherein the trenches extend into the sapphire substrate.

28. A method of producing semiconductor devices according to claim 27, further including the step of filling the trenches to form posts.

29. A method of producing semiconductor devices according to claim 28, wherein the metal support structure extends over the posts.

30. The method of claim 26, further including forming a passivation layer over exposed portions of the GaN buffer layer, of the active layer, and of the GaN contact layer, wherein the passivation layer is formed after the sapphire substrate is removed, and wherein the passivation layer extends into. the trenches.

31. The method of claim 25, further including forming metal pads on the second ohmic contacts.

32. The method of claim 25, further including separating out individual light emitting diodes.

33. The method of claim 32, wherein separating out individual light emitting diodes includes etching through the metal support structure.

34. The method of claim 32, wherein separating out individual light emitting diodes includes sawing through the metal support structure.

35. The method of claim 34, wherein sawing through the metal support structure is performed at a temperature less than 0°

C.

36. The method of claim 26, wherein forming trenches is performed using inductively coupled plasma reactive ion etching (ICP RIE).

37. The method of claim 25, wherein removing the sapphire substrate is performed using a laser lift off procedure.

38. The method of claim 37, wherein the laser lift off procedure includes radiating laser light through the sapphire substrate.

39. The method of claim 25, wherein forming a metal support structure includes electroplating.

40. The method of claim 25, wherein forming a metal support structure includes electro-less plating.

41. The method of claim 25, wherein forming a metal support structure includes CVD.

42. The method of claim 25, wherein forming a metal support structure includes sputtering.