Three dimensional packaging optimized for high frequency circuitry

• US 20060245308A1
• Filed: 02/24/2006
• Published: 11/02/2006
• Est. Priority Date: 02/15/2005
• Status: Abandoned Application

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Inventors: Mendolia, Greg, Macropoulos, William, Khayo, Izzac
• Application Number:
  US11/361,513
• Publication Number:
  US 20060245308A1
• Time in Patent Office: Days
• US Class Current: 369/1
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4824 Connecting between the body and an opposite side of the item with respect to the body
• CPC Class Codes: H01L 2224/49109 outside the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/49811 Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 25/162 the devices being mounted on two or more different substrates
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01051 : Antimony [Sb]
• CPC Class Codes: H01L 2924/01055 : Cesium [Cs]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15331 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/19106 : in a mirrored arrangement on two different side of a common die mounting substrate
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/30111 : matching
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H05K 1/0206 : by printed thermal vias
• CPC Class Codes: H05K 1/0237 : High frequency adaptations H05K1/0216 takes precedence
• CPC Class Codes: H05K 1/024 : Dielectric details, e.g. changing the dielectric material around a transmission line
• CPC Class Codes: H05K 1/141 : One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters H05K1/142 and H05K1/147 take precedence
• CPC Class Codes: H05K 1/142 : Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit
• CPC Class Codes: H05K 1/144 : Stacked arrangements of planar printed circuit boards
• CPC Class Codes: H05K 1/145 : Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules
• CPC Class Codes: H05K 1/165 : incorporating printed inductors
• CPC Class Codes: H05K 2201/0187 : with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
• CPC Class Codes: H05K 2201/045 : Hierarchy auxiliary PCB, i.e. more than two levels of hierarchy for daughter PCBs are important
• CPC Class Codes: H05K 2201/09972 : Partitioned, e.g. portions of a PCB dedicated to different functions; Boundary lines therefore; Portions of a PCB being processed separately or differently
• CPC Class Codes: H05K 2201/1031 : Surface mounted metallic connector elements
• CPC Class Codes: H05K 2201/10636 : Leadless chip, e.g. chip capacitor or resistor
• CPC Class Codes: H05K 2203/041 : Solder preforms in the shape of solder balls soldering leadless components having an array of bottom contacts H05K3/3436
• CPC Class Codes: H05K 2203/0415 : Small preforms other than balls, e.g. discs, cylinders or pillars
• CPC Class Codes: H05K 3/284 : for encapsulating mounted components H05K1/185 takes precedence
• CPC Class Codes: H05K 3/3436 : having an array of bottom contacts, e.g. pad grid array or ball grid array components
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

At least an embodiment of the present technology provides a device, comprising at least one passive component, at least one active component and at least two substrates. The substrates may be advantageously stacked to form a 3D structure. The active and passive components may be advantageously placed in between said substrates to create a compact monolithic 3D device. At least one embodiment of the technology comprises at least a passive component disposed in between said substrates in order to manipulate, distort or otherwise transform at least one electrical signal from one substrate to the next. In another embodiment of the technology at least an interconnector device may be disposed upon at least one substrate in order to respond to mechanical distortions of said substrates under thermal and mechanical stresses. Said interconnector device may be strategically but disjunctively positioned along with other passive components in order to create a rugged compact more efficient 3D package for high frequency operation.

Claims

1. A microelectronic package, comprising:

a first substrate;

at least one additional substrate;

at least one passive component, said passive component further comprising at least one electrical connection electrically coupled to said first substrate and said at least one additional substrate; and

at least one semiconductor chip disposed on said first substrate, said at least one semiconductor chip comprising an active surface and a passive surface, said semiconductor chip with said active surface electrically coupled to at least one substrate.

2. The microelectronic package of claim 1, wherein said passive component is electrically attached by means of at least one type of solder.

3. The microelectronic package of claim 1, wherein said passive components are selected from the group consisting of:

resistors, capacitors, inductors, filters, diplexers, baluns, resonators couplers, piezoelectrics, and coils.

4. The microelectronic package of claim 1, wherein said passive components manipulate high frequency energy from at least said first substrate to said at least one additional substrate by transforming, storing, distorting and dissipating.

5. The microelectronic package of claim 1, wherein said package is used for high frequency.

6. The microelectronic package of claim 1, wherein said substrates create a 3D structure stack.

7. The microelectronic package of claim 1, wherein said substrates materials are selected from the group consisting of:

liquid crystal polymer (LCP), polyolefin, fluropolymers such as polytetrafluorethylene (PTFE), polyvinylidene fluoride (PVDF), polyester products, terphthalates such as polyeylene terephthalate (PET), thermosetting resin bonds and HTCC, Ceramics such as Alumina (Al2O3), Aluminum Nitride (AlN) and glass-ceramic composites such as LTCC.

8. The microelectronic package of claim 1, wherein said semiconductor is attached to at least said first substrate or to said at least one additional substrate by:

solder balls, wirebonds, die attach or conductive epoxy.

9. The microelectronic package of claim 1, wherein said semiconductor chip is a flip chip.

10. The microelectronic package of claim 1, wherein said package is used within mobile RF devices.

11. A microelectronic package, comprising:

a first substrate;

at least one additional substrate;

at least one passive component, said passive component further comprising at least one electrical connection electrically coupled to said first substrate and said at least one additional substrate; and

at least one interconnecting device, said interconnecting device further comprising at least one electrical connection, said interconnecting device electrically coupled to said first substrate and said at least one additional substrate by said electrical connection.

12. The microelectronic package of claim 11, further comprising at least one semiconductor chip disposed on said first substrate, said at least one semiconductor chip comprising an active surface and a passive surface, said semiconductor chip with said active surface electrically coupled to said first substrate or said at least one additional substrate.

13. The microelectronic package of claim 11, wherein said interconnecting device or said passive component is electrically attached by means of at least one type of solder.

14. The microelectronic package of claim 13, wherein said interconnecting device is composed of a metal laminates disposed on both sides of at least one polymer composite laminate.

15. The microelectronic package of claim 13, wherein said interconnecting device is diced to mimic the dimension of space between said first and said at least one additional substrate in order to accommodate said semiconductor chip and said passive components.

16. The microelectronic package of claim 11, wherein said interconnecting device is used to mechanically adjust for thermal and mechanical variations.

17. The microelectronic package of claim 11, wherein said passive component are selected from the group consisting of:

resistors, capacitors, inductors, filters, diplexers, baluns, resonators couplers, piezoelectrics, and coils.

18. The microelectronic package of claim 11, wherein said passive components manipulate high frequency energy from said first substrate to said at least one additional substrate by transforming, storing, distorting and dissipating.

19. The microelectronic package of claim 11, wherein said package is used for high frequency.

20. The microelectronic package of claim 11, wherein said substrates create a 3D structure stack.

21. The microelectronic package of claim 11, wherein said substrates materials are selected from the group consisting of:

liquid crystal polymer (LCP), polyolefin, fluropolymers such as polytetrafluorethylene (PTFE), polyvinylidene fluoride (PVDF), polyester products, terphthalates such as polyeylene terephthalate (PET), thermosetting resin bonds and HTCC, Ceramics such as Alumina (Al2O3), Aluminum Nitride (AlN) and glass-ceramic composites such as LTCC.

22. The microelectronic package of claim 11, wherein said semiconductor is attached to at least said first substrate or to said at least one additional substrate by:

solder balls, wirebonds, die attach or conductive epoxy. The microelectronic package of claim 11, wherein said semiconductor is a flip chip.

23. The microelectronic package of claim 11, wherein said package is used within mobile RF devices.

24. A method of manufacturing a mechanically adapting interconnecting device for muti-substrate packages comprising:

placing a metal laminate on each side of a polymer composite;

forming a channel in said metal laminate; and

metallizing said laminate to create a metal connection inside said channel.

25. The method of claim 24, further comprising dicing with an abrasive dicing wheel to create a trough within said metallized channels to create a dielectric spacing.

26. The method of claim 25, further comprising dicing said interconnecting device to mimic the dimensions of a passive component.

27. The method of claim 25, further comprising dicing said interconnecting device to the dimension that will give enough space to accommodate integrated circuits and other passive components.

28. An apparatus, comprising:

a substrate interconnecting device, said substrate interconnecting device comprising;

a polymer composite with a metal laminate on each side of said polymer composite, said metal laminate including a metallized channel with a metal connection within said metallized channel interconnecting of a plurality of substrates.

29. The apparatus of claim 28, further comprising a trough within said metallized channels to create a dielectric spacing.

30. The apparatus of claim 29, wherein said trough mimics the dimensions of a passive component.

32. The apparatus of claim 29, wherein said interconnecting device is used to mechanically adjust for thermal and mechanical variations.