Systems and methods for multiple input instrumentation buses

• US 20060248249A1
• Filed: 04/29/2005
• Published: 11/02/2006
• Est. Priority Date: 04/29/2005
• Status: Active Grant

• Current Assignee: The Boeing Co.
• Original Assignee: The Boeing Co.
• Inventors: Juelfs, Rodney A., Roth, Andrew S.
• Granted Patent: US 7,406,555 B2
• Time in Patent Office: Days
• US Class Current: 710/124
• CPC Class Codes: H04L 12/40032 Details regarding a bus interface enhancer
• CPC Class Codes: H04L 12/40176 involving redundancy error detection or correction of the data by redundancy in hardware using active fault-masking in interconnections G06F11/2002; error detection or correction of the data by redundancy in hardware using active fault-masking in storage systems using spares or by reconfiguring G06F11/2053
• CPC Class Codes: H04L 2012/40254 Actuator Sensor Interface ASI

Abstract

Systems and methods for multiple input instrumentation buses are disclosed. In one embodiment, a bus assembly includes a control module adapted to be coupled to a network, and a plurality of nodes operatively coupled in a linear topology. A plurality of interface modules are coupled to the nodes. At least one node is adapted to receive a primary response signal from the correspondingly coupled interface module, and a secondary response signal from at least one other node, and to determine which of the primary and secondary response signals arrived first, and to output a corresponding one of the primary and secondary response signals that arrived first.

Claims

1. A bus assembly, comprising:

a control module adapted to be coupled to a network;

a plurality of nodes operatively coupled in a linear topology, a first one of the nodes being further coupled to the control module; and

a plurality of interface modules, each interface module being coupled to a corresponding one of the nodes, wherein at least one node is adapted to receive a primary response signal from the correspondingly coupled interface module and a secondary response signal from at least one other node, and to determine which of the primary and secondary response signals arrived first, and to output a corresponding one of the primary and secondary response signals that arrived first.

2. The bus assembly of claim 1, wherein at least one node is further adapted to receive a control signal and to transmit the control signal to at least one other node and to the correspondingly coupled interface module.

3. The bus assembly of claim 1, wherein the at least one node is further adapted to discard the other of the primary and secondary response signals that did not arrive first.

4. The bus assembly of claim 1, wherein the control module includes a transducer bus controller and a controller node coupled to the transducer bus controller and to the first one of the nodes, and wherein the plurality of interface modules includes at least one transducer bus interface module.

5. The bus assembly of claim 1, wherein the interface modules are adapted to communicate using a set of point-to-point linear Ethernet communications.

6. An instrumentation system, comprising:

a plurality of input sources;

a communication link; and

a bus assembly operatively coupled to the plurality of input sources and to the communication link, the bus assembly including;

a control module operatively coupled to the communication link;

a plurality of nodes operatively coupled in a linear topology, a first one of the nodes being further coupled to the control module; and

a plurality of interface modules, each interface module being coupled to a corresponding one of the nodes, wherein at least one node is adapted to receive a primary response signal from the correspondingly coupled interface module and a secondary response signal from at least one other node, and to determine which of the primary and secondary response signals arrived first, and to output a corresponding one of the primary and secondary response signals that arrived first.

7. The system of claim 6, wherein the at least one node is further adapted to receive a control signal and to transmit the control signal to at least one other node and to the correspondingly coupled interface module.

8. The system of claim 6, wherein the asynchronous portion includes a discipline scheme to prevent collisions between responses of simultaneously responding interface modules.

9. The system of claim 6, wherein the asynchronous portion includes a discipline scheme having a plurality of asynchronous time slots.

10. A method of transmitting information along a multidrop bus, comprising:

providing a plurality of nodes operatively coupled in a linear topology;

providing a plurality of interface modules, each interface module being coupled to a corresponding one of the nodes;

receiving a primary response signal at a first one of the nodes from the correspondingly coupled interface module;

receiving a secondary response signal at the first one of the nodes from at least one other node;

determining which of the primary and secondary response signals arrived earlier; and

outputting the earlier-arriving one of the primary and secondary response signals.

11. The method of claim 10, further comprising receiving a control signal and transmitting the control signal to the at least one other node and to the correspondingly coupled interface module.

12. The method of claim 10, further comprising discarding the other of the primary and secondary response signals that did not arrive first.

13. The method of claim 10, wherein at least one of the receiving a primary response signal, and receiving a secondary response signal, and outputting the earlier-arriving one using a communication unit that includes at least one of an isochronous portion and an asynchronous portion.

14. The method of claim 10, wherein communicating using an isochronous portion includes communicating using an isochronous portion based on a Time Division Multiple Access (TDMA) allocation of bandwidth.

15. The method of claim 10, wherein communicating using an asynchronous portion includes communicating using an asynchronous portion based on a discipline scheme to prevent collisions between responses of simultaneously responding interface modules.

16. The method of claim 10, wherein communicating using an asynchronous portion includes communicating using an asynchronous portion based on a discipline scheme having a plurality of asynchronous time slots.

17. The method of claim 16, wherein communicating using an asynchronous portion based on a discipline scheme having a plurality of asynchronous time slots includes communicating using an asynchronous portion wherein a corresponding one of the asynchronous time slots has a value corresponding to at least one of a try until acknowledged command, a send UUID command, and a retransmit last data packet command.