Multiple Chip Package Module Including Die Stacked Over Encapsulated Package

• US 20060249851A1
• Filed: 05/05/2006
• Published: 11/09/2006
• Est. Priority Date: 05/05/2005
• Status: Active Grant

• Current Assignee: Stats Chippac Pte. Lte.
• Original Assignee: Stats Chippac BVI limited (JCET Group Co., Ltd.)
• Inventors: Karnezos, Marcos
• Granted Patent: US 7,582,960 B2
• Time in Patent Office: Days
• US Class Current: 257/777
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48145 the bodies being stacked
• CPC Class Codes: H01L 2224/48225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73215 Layer and wire connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2225/06506 Wire or wire-like electrical connections between devices
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06568 the devices decreasing in size, e.g. pyramidical stack
• CPC Class Codes: H01L 2225/06586 Housing with external bump or bump-like connectors
• CPC Class Codes: H01L 2225/06596 Structural arrangements for testing testing or measuring during manufacture or treatment H01L22/00; testing electrical properties or locating electrical faults G01R31/00
• CPC Class Codes: H01L 2225/1023 the support being an insulating substrate
• CPC Class Codes: H01L 2225/1052 Wire or wire-like electrical connections
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 25/03 : all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A module having multiple die includes a first package (such as a land grid array package) inverted and mounted upon a lower substrate, and one or more die mounted or stacked over the upward-facing side of the inverted package.

Claims

1. A multiple chip package module comprising a module substrate, a first package comprising a first package die mounted on a die mount side of a first package substrate and an encapsulation covering the first package die and the die mount side of the first package substrate, the first package being inverted and mounted over a first side of the module substrate and electrically connected with the bottom substrate by wire bonds, and a first additional die mounted over a land side of the first package substrate.

2. The multiple chip package module of claim 1, further comprising a second additional die mounted over the first die.

3. The multiple chip package module of claim 1 wherein the first additional die is mounted active side facing away from the first package substrate and is electrically connected with the module substrate by wire bonding.

4. The multiple chip package module of claim 1 wherein the first additional die is mounted active side facing toward the first package substrate and is electrically connected with the land side of the first package substrate by flip chip interconnect.

5. The multiple chip package module of claim 1 wherein the first package comprises a plurality of die stacked over the die mount side of the first package substrate.

6. The multiple chip package module of claim 1 wherein the first package further comprises a second package die stacked over the first package die.

7. The multiple chip package module of claim 1 wherein the first package die is mounted active side facing away from the first package substrate and is electrically connected with the first package substrate by wire bonding.

8. The multiple chip package module of claim 1 wherein the first package die is mounted active side facing toward the first package substrate and is electrically connected with the first package substrate by flip chip interconnect.

9. The multiple chip package module of claim 2 wherein the first additional die is mounted active side facing away from the first package substrate and is electrically connected with the land side of the first package substrate by wire bonding.

10. The multiple chip package module of claim 2 wherein the first additional die is mounted active side facing away from the first package substrate and is electrically connected with the land side of the module substrate by wire bonding.

11. The multiple chip package module of claim 2 wherein the first additional die is mounted active side facing toward the first package substrate and is electrically connected with the land side of the first package substrate by flip chip interconnect.

12. A computer containing the multiple chip package module of claim 1.

13. A portable electronic apparatus containing the multiple chip package module of claim 1.

14. A mobile telecommunications device containing the multiple chip package module of claim 1.