Pixel structure with improved viewing angle

• US 20060250533A1
• Filed: 05/03/2005
• Published: 11/09/2006
• Est. Priority Date: 05/03/2005
• Status: Abandoned Application

• Current Assignee: HannStar Display Corporation
• Original Assignee: HannStar Display Corporation
• Inventors: Shih, Po-Sheng
• Application Number:
  US11/119,773
• Publication Number:
  US 20060250533A1
• Time in Patent Office: Days
• US Class Current: 349/38
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode

Abstract

According to the present invention, a pixel region is divided into a plurality of sub-pixel regions. Each sub-pixel region has independent adjustable parameters related to its optical characteristic. In other words, different optical characteristic may be presented by adjusting the parameter of a sub-pixel region. The optical characteristic of the whole pixel region is a combination of each sub-pixel region optical characteristic. By adjusting the parameter related to optical characteristics in each sub-pixel region, an optimum combining optical characteristic may be presented.

Claims

1. A pixel structure of a liquid crystal display, said pixel structure comprising:

a plurality of scan lines arranged in a first direction and parallel to each other; and

a plurality of video data lines arranged in a second direction to cross said plurality of scan lines and parallel to each other, wherein any adjacent scan lines and any adjacent video data lines define a pixel region, each pixel region including at least two sub-pixel regions, and each sub-pixel region comprising;

one switching transistor,which has a gate electrode coupled to said scan line, a source electrode coupled to a tranparent conductive layer, and a drain electrode coupled to said video data line;

wherein said two sub-pixel regions respectively have at least one capacitor, which have different capacitances for differentiating voltages of said two transparent conductive layers.

2. The pixel structure of claim 1, wherein said pixel region further comprises a common electrode, and said two subpixel regions respectively have liquid crystal capacitors with different capacitances formed between said common electrode and said transparent conductive layer.

3. The pixel structure of claim 2, wherein overlapping areas between said common electrode and said transparent conductive layers in siad two subpixel regions are different.

4. The pixel structure of claim 1, wherein said pixel region further comprises a storage electrode and said two sub-pixel regions respectively have storage capacitors with different capacitances formed between said storage electrode and said transparent conductive layer.

5. The pixel structure of claim 4, wherein overlapping areas between said storage electrodes and said transparent conductive layers in said two sub-pixel regions are different.

6. The pixel structure of claim 4, wherein said storage electrode of said pixel region is coupled with a common voltage.

7. The pixel structure of claim 4, wherein said storage electrode of said pixel region is coupled with said scan line of an adjacent pixel region.

8. The pixel structure of claim 4, wherein said storage electrode of said pixel region is coupled with a bias voltage.

9. The pixel structure of claim 1, wherein said two sub-pixle regions respectively have diffusion capacitors with different capacitances formed between said gate electrode and said source electrode of said switching transistor.

10. The pixel structure of claim 9, wherein overlapping areas between said gate electrodes and said source electrodes of said switching transistors in said two sub-pixel regions are different.

11. The pixel structure of claim 1, wherein said transparent conductive layers are indium tin oxide (ITO) layers.