Non-volatile-shadow latch using a nanotube switch

• US 20060250843A1
• Filed: 11/15/2005
• Published: 11/09/2006
• Est. Priority Date: 05/09/2005
• Status: Active Grant

• Current Assignee: Nantero Incorporated
• Original Assignee: Nantero Incorporated
• Inventors: Huang, X.M. H., Bertin, Claude L., Sivarajan, Ramesh, Rueckes, Thomas, Guo, Frank, Strasburg, Max, Meinhold, Mitchell, Konsek, Steven L.
• Granted Patent: US 7,394,687 B2
• Time in Patent Office: Days
• US Class Current: 365/185.80
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: G11C 13/0033 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 13/025 using fullerenes, e.g. C60, or nanotubes, e.g. carbon or silicon nanotubes
• CPC Class Codes: G11C 14/00 Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
• CPC Class Codes: Y10S 977/943 Information storage or retrieval using nanostructure

Abstract

A non-volatile memory cell includes a volatile storage device that stores a corresponding logic state in response to electrical stimulus; and a shadow memory device coupled to the volatile storage device. The shadow memory device receives and stores the corresponding logic state in response to electrical stimulus. The shadow memory device includes a non-volatile nanotube switch that stores the corresponding state of the shadow device.

Claims

1. A non-volatile memory cell comprising:

a volatile storage device that stores a corresponding logic state in response to electrical stimulus; and

a shadow memory device coupled to the volatile storage device so as to receive and store the corresponding logic state in response to electrical stimulus, said shadow memory device including a non-volatile nanotube switch, wherein said nanotube switch stores the corresponding state of the shadow device.

2. The non-volatile memory cell of claim 1, wherein the non-volatile nanotube switch comprises a two terminal nanotube switch.

3. The non-volatile memory cell of claim 1, further comprising a coupling circuit capable of transferring the corresponding logic state of the volatile storage device to the shadow memory device in response to electrical stimulus, and further capable of transferring a logic state of the shadow memory device to the volatile storage device in response to electrical stimulus.

4. The non-volatile memory cell of claim 1, further comprising a coupling circuit including:

a program circuit providing an electrical pathway between the volatile storage device and the shadow memory device and responsive to a program signal to transfer a corresponding logic state of the volatile storage device to the shadow memory device; and

a restore circuit providing an electrical pathway between the shadow memory device and the volatile storage device and responsive to a restore signal to transfer a logic state of the shadow memory device to the volatile storage device.

5. The non-volatile memory cell of claim 1, further comprising a coupling circuit including:

an erase circuit in electrical communication with the shadow memory device and responsive to an erase signal to erase a logic state of the shadow memory device.

6. The non-volatile memory cell of claim 1, wherein a first terminal of the nanotube switch is in electrical communication with an output node of the volatile storage device, and wherein a second terminal of the nanotube switch is in electrical communication with a program/erase/read line.

7. The non-volatile memory cell of claim 1, further comprising a controller in electrical communication with the volatile storage device and capable of monitoring a level of power to the volatile storage device.

8. The non-volatile memory cell of claim 7, said controller capable of applying electrical stimulus to the shadow memory device in response to a loss of power to the volatile storage device, said electrical stimulus transferring the logic state of the volatile storage device to the shadow memory device.

9. The non-volatile memory cell of claim 7, said controller capable of applying electrical stimulus to the shadow memory device in response to an increase of power to the volatile storage device, said electrical stimulus transferring the logic state of the shadow memory device to the volatile storage device.

10. The non-volatile memory cell of claim 1, wherein the state stored by the non-volatile nanoswitch is characterized by the resistance of an electrical pathway in the nanoswitch.

11. The non-volatile memory cell of claim 1, further comprising a master latch stage capable of receiving a voltage and outputting said voltage to the volatile storage device, said voltage corresponding to a logic state.

12. The non-volatile memory cell of claim 11, wherein a random logic stage produces the voltage corresponding to the logic state.

13. The non-volatile memory cell of claim 11, wherein an onboard cache produces the voltage corresponding to the logic state.