Random access memory with stability enhancement and early ready elimination
First Claim
Patent Images
1. A random access memory, comprising:
- a memory cell including at least one access device, the at least one access device being switched on or off in accordance with a signal on a wordline to conduct a memory operation through the at least one access device; and
a logic circuit coupled to the wordline to gate the wordline signal until an enable signal has arrived at the logic circuit.
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Abstract
A random access memory includes a memory cell having an access device. The access device is switched on or off in accordance with a signal on a wordline to conduct a memory operation through the access device. A logic circuit is coupled to the wordline to delay or gate the wordline signal until an enable signal has arrived at the logic circuit. The access device improves stability and eliminates early read problems.
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Citations
12 Claims
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1. A random access memory, comprising:
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a memory cell including at least one access device, the at least one access device being switched on or off in accordance with a signal on a wordline to conduct a memory operation through the at least one access device; and
a logic circuit coupled to the wordline to gate the wordline signal until an enable signal has arrived at the logic circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A static random access memory, comprising:
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a memory cell including first and second access transistors respectively coupled to first and second bitlines, the first and second access transistors having gates coupled to a connection node; and
a logic circuit coupled to a wordline, the logic circuit selectively coupling the wordline to the connection node in accordance with an enable signal, such that a trigger signal on the wordline is synchronized with bit line signals to reduce or eliminate an early read condition. - View Dependent Claims (9, 10, 11, 12)
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Specification