MULTIPLE DOPING LEVEL BIPOLAR JUNCTIONS TRANSISTORS AND METHOD FOR FORMING

• US 20060252215A1
• Filed: 07/18/2006
• Published: 11/09/2006
• Est. Priority Date: 09/29/2004
• Status: Active Grant

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: Agere Systems Incorporated (Broadcom, Inc.)
• Inventors: Carroll, Michael Scott, Key, Roger W., Lai, Thiet The, Hamad, Amal Ma, Kerr, Daniel Charles
• Granted Patent: US 7,449,388 B2
• Time in Patent Office: Days
• US Class Current: 438/309
• CPC Class Codes: H01L 21/8249 Bipolar and MOS technology
• CPC Class Codes: H01L 27/0623 in combination with bipolar transistors
• CPC Class Codes: H01L 27/0928 comprising both N- and P- wells in the substrate, e.g. twin-tub
• CPC Class Codes: H01L 29/0821 Collector regions of bipolar transistors
• CPC Class Codes: H01L 29/66272 Silicon vertical transistors H01L29/66242, H01L29/66257 and H01L29/66265 take precedence

Abstract

A process for forming bipolar junction transistors having a plurality of different collector doping densities on a semiconductor substrate and an integrated circuit comprising bipolar junction transistors having a plurality of different collector doping densities. A first group of the transistors are formed during formation of a triple well for use in providing triple well isolation for complementary metal oxide semiconductor field effect transistors also formed on the semiconductor substrate. Additional bipolar junction transistors with different collector doping densities are formed during a second doping step after forming a gate stack for the field effect transistors. Implant doping through bipolar transistor emitter windows forms bipolar transistors having different doping densities than the previously formed bipolar transistors. According to one embodiment of the present invention, bipolar junction transistors having six different collector dopant densities (and thus six different breakdown characteristics) are formed.

Claims

1. A process for forming a bipolar junction transistor in a semiconductor substrate, the process comprising:

forming a first doped tub region of a first dopant type within the substrate;

forming a doped sinker region of a second dopant type within the substrate;

forming second and third doped tub regions of the second dopant type in the substrate; and

concurrently forming a subcollector region and a triple well region both of the second dopant type, wherein the triple well region and the second and the third doped tub regions cooperate to electrically isolate the first doped tub region from the substrate, and wherein the subcollector region cooperates with the doped sinker region.

2. The process of claim 1 further comprising:

forming first structures associated with the first doped tub region and the triple well region, wherein the first structures, the first doped tub region and the triple well region cooperate to form a first metal oxide semiconductor field effect transistor; and

forming second structures associated with the doped sinker region and the subcollector region, wherein the second structures, the doped sinker region and the subcollector region cooperate to form the bipolar junction transistor.

3. The process of claim 2 wherein the first structures comprise a gate structure, and wherein the step of forming the first structures is executed after the step of concurrently forming the subcollector region and the triple well region.

4. The process of claim 2 further comprising forming a second metal oxide semiconductor field effect transistor of an opposite doping type from the first metal oxide semiconductor field effect transistor, wherein the first and the second metal oxide semiconductor field effect transistors form complimentary metal oxide semiconductor field effect transistors.

5. The process of claim 1 wherein the step of concurrently forming the subcollector region and the triple well region comprises implanting dopants to form the subcollector region and the triple well region.

6. The process of claim 5 wherein the step of implanting dopants further comprises implanting phosphorous at about 1000 keV with a dose of about 2E13 per cubic cm.

7. The process of claim 1 wherein the step of forming the doped sinker region and the step of forming the second and the third doped tub regions are executed concurrently.

8. A process for forming a bipolar junction transistor in a semiconductor substrate, the process comprising:

forming a first doped tub region of a first dopant type within the substrate;

forming a doped sinker region of a second dopant type within the substrate;

forming second and third doped tub regions of the second dopant type in the substrate; and

concurrently forming a subcollector region and a triple well region both of the second dopant type, wherein the triple well region and the second and the third doped tub regions cooperate to electrically isolate the first doped tub region from the substrate, and wherein the subcollector region cooperates with the doped sinker region; and

doping the subcollector region with the second dopant type.

9. The process of claim 8 further comprising:

forming metal oxide semiconductor field effect transistor structures for cooperating with the first doped tub region and the triple well region to form a metal oxide semiconductor field effect transistor; and

forming bipolar junction transistor structures for cooperating with the doped sinker region and the subcollector region to form the bipolar junction transistor.

10. The process of claim 9 wherein the metal oxide semiconductor field effect transistor structures comprise a gate structure, and wherein the step of forming the first structures is executed after the step of concurrently forming the subcollector region and the triple well region and before the step of doping the subcollector region.

11. The process of claim 8 wherein the step of concurrently forming the subcollector region and the triple well region comprises implanting dopants to form the subcollector region and the triple well region, and wherein the step of doping the subcollector region further comprises implanting dopants into the subcollector region.

12. The process of claim 11 wherein the step of implanting dopants to form the subcollector region and the triple well region further comprises implanting phosphorous at about 1000 keV with a dose of about 2E13 per cubic cm, and wherein the step of implanting dopants into the subcollector region further comprises implanting phosphorous at about 900 keV with a dose of about 5E14 per cubic cm.

13. The process of claim 8 wherein the step of forming the doped sinker region and the step of forming the second and the third doped tub regions are executed concurrently.

14. A process for forming a bipolar junction transistor in a semiconductor substrate, the process comprising:

forming a first doped tub region of a first dopant type within the substrate;

forming a doped sinker region of a second dopant type within the substrate;

forming second and third doped tub regions of the second dopant type in the substrate;

concurrently forming a subcollector region and a triple well region both of the second dopant type, wherein the triple well region and the second and the third doped tub regions cooperate to electrically isolate the first doped tub region from the substrate, and wherein the subcollector region cooperates with the doped sinker region;

doping the subcollector region with the second dopant type; and

doping a portion of the subcollector region with the second dopant type.

15. The process of claim 14 further comprising:

forming metal oxide semiconductor field effect transistor structures for cooperating with the first doped tub region and the triple well region to form a metal oxide semiconductor field effect transistor; and

forming bipolar junction transistor structures for cooperating with the doped sinker region and the subcollector region to form a bipolar junction transistor.

16. The process of claim 14 wherein the step of concurrently forming the subcollector region and the triple well region comprises implanting dopants to form the subcollector region and the triple well region, and wherein the step of doping the subcollector region further comprises implanting dopants into the subcollector region, and wherein the step of doping the portion of the subcollector region comprises implanting dopants into the portion of the subcollector region.

17. The process of claim 16 wherein the step of implanting dopants to form the subcollector region and the triple well region further comprises implanting phosphorous at about 1000 keV with a dose of about 2E13 per cubic cm, and wherein the step of implanting dopants into the subcollector region further comprises implanting phosphorous at about 900 keV with a dose of about 5E14 per cubic cm, and where in the step of implanting dopants into the portion of the subcollector region further comprises implanting phosphorous at about 500 keV with a dose of about 1.5E13.

18. The process of claim 14 further comprising forming material layers overlying the substrate and forming an emitter window within one or more of the material layers, wherein the step of doping the portion of the subcollector region comprises doping the portion of the subcollector region through the emitter window.

19. A process for forming bipolar junction transistors in a semiconductor substrate, the process comprising:

forming a first doped tub region of a first dopant type with the substrate;

forming first, second, third and fourth doped sinker regions of a second dopant type within the substrate;

forming second and third tub regions of the second dopant type in the substrate;

concurrently forming first, second, third and fourth subcollector regions and a triple well region all of the second dopant type, wherein the triple well region and the second and the third tub regions cooperate to electrically isolate the first doped tub region from the substrate, and wherein each one of the first, second, third and fourth subcollector region cooperates with a respective one of the first, second, third and fourth doped sinker regions;

doping the second and the fourth subcollector regions with the second dopant type; and

doping a portion of the third and the fourth subcollector regions with the second dopant type.

20. The process of claim 19 further comprising:

forming metal oxide semiconductor field effect transistor structures for cooperating with the first doped tub region and the triple well region to form a metal oxide semiconductor field effect transistor;

forming first bipolar junction transistor structures for cooperating with the first doped sinker region and the first subcollector region to form a first bipolar junction transistor;

forming second bipolar junction transistor structures for cooperating with the second doped sinker region and the second subcollector region to form a second bipolar junction transistor;

forming third bipolar junction transistor structures for cooperating with the third doped sinker region and the third subcollector region to form a third bipolar junction transistor; and

forming fourth bipolar junction transistor structures for cooperating with the fourth doped sinker region and the fourth subcollector region to form a fourth bipolar junction transistor;

wherein the first, second, third and fourth bipolar junction transistors exhibit breakdown characteristics in the following order beginning with the bipolar junction transistor having the highest breakdown voltage, the first bipolar junction transistor, the third bipolar junction transistor, the second bipolar junction transistor and the fourth bipolar junction transistor.

21. The process of claim 20 wherein the metal oxide semiconductor field effect transistor structures comprise a gate structure, and wherein the step of forming the metal oxide semiconductor field effect transistor structures is executed after the step of concurrently forming the first, second, third and fourth subcollector regions and the triple well region and before the step of doping the second and the fourth subcollector regions.

22. The process of claim 21 wherein the step of forming the metal oxide semiconductor field effect transistor structures is executed before the step of doping the second and the fourth subcollector regions.

23. The process of claim 19 wherein the step of concurrently forming the first, second, third, and fourth subcollector regions and the triple well region comprises implanting dopants to form the first, second, third and fourth subcollector regions and the triple well region, and wherein the step of doping the subcollector region further comprises implanting dopants into the subcollector region, and wherein the step of doping a portion of the subcollector region further comprises implanting dopants into the portion of the subcollector region.

24. The process of claim 23 wherein the step of implanting dopants to form the subcollector region and the triple well region further comprises implanting phosphorous at about 1000 keV with a dose of about 2E13 per cubic cm, and wherein the step of implanting dopants into the subcollector region further comprises implanting phosphorous at about 900 keV with a dose of about 5E14 per cubic cm, and wherein the step of implanting dopants into the portion of the subcollector region further comprises implanting phosphorous at about 500 keV with a dose of about 1.5E13.

25. The process of claim 19 further comprising forming material layers overlying the substrate and forming first, second, third and fourth emitter windows within one or more of the material layers, wherein the step of doping the portion of the third and the fourth subcollector regions further comprises doping the portion of the third and the fourth subcollector regions through the third and the fourth emitter window, respectively.

26. A process for forming bipolar junction transistors in a semiconductor substrate further comprising a metal oxide semiconductor field effect transistor, the process comprising:

forming a first doped tub and a plurality of doped collector sinker regions within the substrate;

forming a second and a third doped tub within the substrate;

forming a triple well region for cooperating with the second and the third doped tubs to electrically isolate the first doped tub from the substrate and forming a first plurality of subcollector regions comprising a first doping level;

forming structures associated with the metal oxide semiconductor field effect transistor;

doping a first subset of the first plurality of subcollector regions to form a second plurality of subcollector regions while doping other regions of the substrate to form a third plurality of subcollector regions, wherein the second plurality of subcollector regions comprise a second doping level and the third plurality of subcollector regions comprise a third doping level; and

doping a second subset of the first plurality of subcollector regions to form a fourth plurality of subcollector regions while doping a subset of the third plurality of subcollector regions to form a fifth plurality of subcollector regions and while doping a subset of the first subset of the first plurality of subcollector regions to form a sixth plurality of subcollector regions, wherein the fourth plurality of subcollector regions comprise a fourth doping level, and wherein the fifth plurality of subcollector regions comprise a fifth doping level, and wherein the sixth plurality of subcollector regions comprise a sixth doping level.

27. The process of claim 26 further comprising forming a base region and an emitter region for cooperating with one of the first, second, third, fourth, fifth and sixth subcollector region and one of the plurality of doped collector sinker regions to form, respectively, a first, second, third, fourth, fifth and sixth bipolar junction transistor.

28. The process of claim 27 wherein the first, second, third, fourth, fifth and sixth bipolar junction transistors exhibit breakdown characteristics in the following order beginning with the bipolar junction transistor having the highest breakdown voltage, according to the doping level of the subcollector, the first doping level, the fourth doping level, the third doping level, the second doping level, the fifth doping level and the sixth doping level.

29. The process of claim 26 wherein the step of forming structures associated with the metal oxide semiconductor field effect transistor further comprises depositing a layer of polysilicon and forming a gate for the metal oxide semiconductor field effect transistor.

30. The process of claim 26 wherein the structures associated with the metal oxide semiconductor field effect transistor comprise a gate structure, and wherein the step of forming structures associated with the metal oxide semiconductor field effect transistor is executed after the step of forming the triple well region and the first plurality of subcollector regions and before the step of doping the first subset of the first plurality of subcollector regions.

31. The process of claim 30 wherein the step of forming structures associated with the metal oxide semiconductor field effect transistor is executed before the step of doping the first subset of the first plurality of subcollector regions.

32. The process of claim 26 further comprising forming material layers overlying the substrate and forming emitter windows within one or more of the material layers, wherein the step of doping the second subset of the first plurality of subcollector regions while doping a subset of the third plurality of subcollector regions and while doping a subset of the first subset of the first plurality of subcollector regions comprises doping through the emitter windows.

33. A process for forming bipolar junction transistors in a semiconductor substrate further comprising complimentary metal oxide semiconductor field effect transistors, the process comprising:

forming a first doped tub of a first dopant type within the substrate;

forming a second doped tub and a plurality of sinker regions of a second dopant type within the substrate;

forming third and fourth doped tubs of the second doping type in the substrate;

forming a triple well region and a first plurality of subcollector regions comprising a first doping level, wherein the triple well region and the first plurality of subcollector regions are of the second dopant type, and wherein the third and the fourth doped tubs cooperate with the triple well region to electrically isolate the first doped tub from the substrate, and wherein each one of the first plurality of subcollector regions cooperates with one of the plurality of sinker regions;

forming structures associated with the complementary metal oxide semiconductor field effect transistors after forming the triple well region and the first plurality of subcollector regions, wherein one of the structures comprises a gate for each of the complementary metal oxide semiconductor field effect transistors;

doping a first subset of the first plurality of subcollector regions to form a second plurality of subcollector regions comprising a second doping level;

doping a second subset of the first plurality of subcollector regions to form a third plurality of subcollector regions comprising a third doping level; and

doping a subset of the second plurality of subcollector regions to form a fourth plurality of subcollector regions comprising a fourth doping level.

34. The process of claim 33 wherein the bipolar junction transistors exhibit breakdown characteristics in the following order beginning with the bipolar junction transistor having the highest breakdown voltage, according to the doping level of the subcollector, the first doping level, the third doping level, the second doping level and the fourth doping level.