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METHOD OF MANUFACTURING A SUPERJUNCTION DEVICE

  • US 20060252219A1
  • Filed: 05/12/2006
  • Published: 11/09/2006
  • Est. Priority Date: 12/19/2003
  • Status: Active Grant
First Claim
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1. A method of manufacturing a semiconductor device comprising:

  • providing a semiconductor substrate having first and second main surfaces opposite to each other, the semiconductor substrate having a heavily doped region of a first conductivity type at the second main surface and having a lightly doped region of the first conductivity type at the first main surface;

    oxidizing the exposed surface of the lightly doped region of the first conductivity type;

    providing a plurality of first trenches and at least one second trench and mesas in the semiconductor substrate, each first trench having a first extending portion extending from the first main surface toward the heavily doped region to a first depth position, the at least one second trench having a second extending portion extending from the first main surface toward the heavily doped region to a second depth position, each mesa having a sidewall surface, each of the plurality first trenches and the at least one second trench being separated from adjacent trenches by one of the mesas, the at least one second trench being deeper and wider than each of the plurality of first trenches, the at least one second trench being positioned at a border between an active region and a termination region, the active region being the area on which semiconductor devices will be formed and the termination region being an area which provides insulation between cells of active devices;

    performing a chemical vapor deposition (CVD) process step to seal the tops of each of the plurality of first trenches and the at least one second trench, creating voids within each of the plurality of first trenches and the at least one second trench, and covering the top of each mesa;

    depositing a layer of material selected from a group including a photoresist, a nitride, a metal and polysilicon over the edge termination region and partially over the at least one second trench at the border between the active and edge termination regions;

    performing a dry oxide etch step to remove the seal over the plurality of first trenches and the at least one second trench;

    performing a wet oxide etch step to remove the oxide from the CVD step remaining in the plurality of first trenches, the at least one second trench and on the tops of the mesas, while oxide from the initial oxidization remains on the tops of the mesas, the wet oxide etch step forming an overhang of the photoresist/nitride/metal/polysilicon material over the at least one second trench at the border between the active and termination regions;

    implanting a dopant of the first conductivity type into at least one mesa of the semiconductor substrate between an adjacent pair of the plurality of first trenches at a sidewall surface of one trench to form at the sidewall surface of the one trench a first doped region of the first conductivity type having a doping concentration lower than that of the heavily doped region, the overhang preventing the implantation of the bottom of the at least one second trench at the border between active and termination regions;

    implanting a dopant of the second conductivity type into at least one mesa at a sidewall surface opposite to the sidewall implanted with the dopant of the first conductivity type to provide a second doped region of the second conductivity type at the sidewall surface opposite to the sidewall implanted with the dopant of the first conductivity type;

    refilling the plurality of first trenches with an insulating material; and

    planarizing the top surface of the device.

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