Processing system and method for chemically treating a tera layer

• US 20060254716A1
• Filed: 07/14/2006
• Published: 11/16/2006
• Est. Priority Date: 07/06/2004
• Status: Abandoned Application

• Current Assignee: Tokyo Electron Limited
• Original Assignee: Tokyo Electron Limited
• Inventors: Yamashita, Asao, Mosden, Aelan
• Application Number:
  US11/486,105
• Publication Number:
  US 20060254716A1
• Time in Patent Office: Days
• US Class Current: 156/345.430
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/02167 the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/0276 using an anti-reflective coating anti-reflective coating for lithography in general G03F7/09
• CPC Class Codes: H01L 21/0332 characterised by their composition, e.g. multilayer masks, materials
• CPC Class Codes: H01L 21/0337 characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
• CPC Class Codes: H01L 21/3148 Silicon Carbide layers
• CPC Class Codes: H01L 21/31633 Deposition of carbon doped silicon oxide, e.g. SiOC

Abstract

A processing system and method for chemically treating a TERA layer on a substrate. The chemical treatment of the substrate chemically alters exposed surfaces on the substrate. In one embodiment, the system for processing a TERA layer includes a plasma-enhanced chemical vapor deposition (PECVD) system for depositing the TERA layer on the substrate, an etching system for creating features in the TERA layer, and a processing subsystem for reducing the size of the features in the TERA layer.

Claims

1. A system for processing a Tunable Etch Rate ARC (TERA) layer on a substrate, comprising:

a processing subsystem for depositing the TERA layer on the substrate using a plasma enhanced chemical vapor deposition (PECVD) system;

a processing subsystem for creating features in the TERA layer using an etching system; and

a processing subsystem for reducing the size of the features in the TERA layer.

2. The system of claim 1, further comprising:

a substrate holder in a processing chamber in the PECVD system; and

means for providing a process gas to the processing chamber, wherein the process gas comprises an inert gas and a silicon-containing precursor, or a carbon-containing precursor, or a combination thereof.

3. The system of claim 2, further comprising:

an upper electrode coupled to the processing chamber; and

a translation device coupled to the substrate holder for establishing a gap between an upper electrode surface and a surface of the substrate holder.

4. The system of claim 3, wherein the gap ranges from approximately 10 mm to approximately 200 mm.

5. The system of claim 2, further comprising:

a first RF source coupled to the upper electrode, wherein the first RF source operates in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. and operates in a power range from approximately 10 watts to approximately 10000 watts.

6. The system of claim 5, further comprising:

a second RF source coupled to the substrate holder, wherein the second RF source operates in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. and operates in a power range from approximately 10 watts to approximately 10000 watts.

7. The system of claim 2, further comprising:

an RF source coupled to the substrate holder, wherein the RF source operates in a frequency range from approximately 0.1 MHz. to approximately 200 MHz. and operates in a power range from approximately 10 watts to approximately 10000 watts.

8. The system of claim 2, wherein the silicon-containing precursor comprises monosilane (SiH₄), tetraethylorthosilicate (TEOS), monomethylsilane (1 MS), dimethylsilane (2MS), trimethylsilane (3MS), tetramethylsilane (4MS), octamethylcyclotetrasiloxane (OMCTS), dimethyldimethoxysilane (DMDMOS), or tetramethylcyclotetrasilane (TMCTS), or a combination of two or more thereof.

9. The system of claim 2, wherein the carbon-containing precursor comprises CH₄, C₂H₄, C₂H₂, C₆H₆, or C₆H₅OH, or a combination of two or more thereof.

10. The system of claim 2, wherein the first process gas includes an inert gas comprising argon, helium, or and nitrogen, or a combination of two or more thereof.