STRUCTURES AND METHODS TO ENHANCE COPPER METALLIZATION

• US 20060255462A1
• Filed: 07/18/2006
• Published: 11/16/2006
• Est. Priority Date: 01/18/2000
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Farrar, Paul A.
• Granted Patent: US 7,535,103 B2
• Time in Patent Office: Days
• US Class Current: 257/751
• CPC Class Codes: H01L 21/32051 Deposition of metallic or metal-silicide layers
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
• CPC Class Codes: H01L 21/76823 transforming an insulating layer into a conductive layer
• CPC Class Codes: H01L 21/76825 by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc. plasma treatment H01L21/76826
• CPC Class Codes: H01L 21/76828 thermal treatment
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76841 Barrier, adhesion or liner layers
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76855 After-treatment introducing at least one additional element into the layer
• CPC Class Codes: H01L 21/76859 by ion implantation
• CPC Class Codes: H01L 21/76867 characterized by methods of formation other than PVD, CVD or deposition from a liquids PVD H01L21/2855; CVD H01L21/28556; deposition from liquids H01L21/288
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 21/76874 for electroless plating
• CPC Class Codes: H01L 21/76879 by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating plating on semiconductors in general H01L21/288
• CPC Class Codes: H01L 21/7688 by deposition over sacrificial masking layer, e.g. lift-off lift-off per se H01L21/0272
• CPC Class Codes: H01L 23/53228 the principal metal being copper
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 23/5329 Insulating materials
• CPC Class Codes: H01L 23/53295 Stacked insulating layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Disclosed structures and methods inhibit atomic migration and related capacitive-resistive effects between a metallization layer and an insulator layer in a semiconductor structure. One exemplary structure includes an inhibiting layer between an insulator and a metallization layer. The insulator includes a polymer or an insulating oxide compound. And, the inhibiting layer has a compound formed from a reaction between the polymer or insulating oxide compound and a transition metal, a representative metal, or a metalloid.

Claims

1. A semiconductor structure comprising:

an insulator layer having a first substance, wherein the first substance comprises a material having a plurality of single hydrocarbon molecule bonded together;

an inhibiting layer on the insulator layer, wherein the inhibiting layer includes a compound formed from the first substance and a second substance so as to inhibit undesired atomic migration; and

a copper metallization layer on the inhibiting layer.

2. The semiconductor structure of claim 1, wherein the first substance is selected from a group consisting of a polymer and a foamed polymer.

3. The semiconductor structure of claim 2, wherein the first substance is selected from a group consisting of a polyimide and a foamed polyimide.

4. The semiconductor structure of claim 1, wherein the insulator layer includes a material that comprises at least two mers bonded together that have been treated so as to have a low dielectric constant.

5. A semiconductor structure comprising:

an insulator layer having a first substance, wherein the first substance comprises a material selected from a group consisting of a polymer and a foamed polymer;

an inhibiting layer on the insulator layer, wherein the inhibiting layer includes a second substance, wherein the second substance is selected from a group consisting of a transition metal and a representative metal, and wherein the inhibiting layer includes a compound formed by the first substance and the second substance so as to inhibit undesired atomic migration; and

a copper metallization layer on the inhibiting layer.

6. The semiconductor structure of claim 5 wherein the inhibiting layer includes a transition metal that includes zirconium.

7. The semiconductor structure of claim 6, wherein the inhibiting layer includes a layer of zirconium with a thickness of about 5 Angstroms to about 40 Angstroms.

8. The semiconductor structure of claim 6, wherein the inhibiting layer includes a layer of zirconium with a thickness of about 10 Angstroms to about 30 Angstroms.

9. The semiconductor structure of claim 5, wherein the inhibiting layer includes a layer of zirconium with a thickness of about 20 Angstroms.

10. The semiconductor structure of claim 5, wherein the inhibiting layer includes a representative metal that includes aluminum.

11. The semiconductor structure of claim 10, wherein the inhibiting layer includes a layer of aluminum with a thickness of about 5 Angstroms to about 40 Angstroms.

12. The semiconductor structure of claim 10, wherein the inhibiting layer includes a layer of aluminum with a thickness of about 20 Angstroms to about 30 Angstroms.

13. The semiconductor structure of claim 10, wherein the inhibiting layer includes a layer of aluminum with a thickness of about 20 Angstroms.

14. A semiconductor structure comprising:

an insulator layer having a first substance, wherein the first substance comprises a material selected from a group consisting of a polymer, a foamed polymer, a fluorinated polymer, a fluorinated-foamed polymer, and an insulator oxide compound;

an inhibiting layer on the insulator layer, wherein the inhibiting layer includes a second substance is selected from a group consisting of a transition metal, a representative metal, and a metalloid, and wherein the inhibiting layer includes a compound formed form a reaction between the first substance and the second substance so as to inhibit undesired atomic migration; and

a copper metallization layer on the inhibiting layer.

15. The semiconductor structure of claim 14, wherein the inhibiting layer includes the compound formed by a reaction between the second substance with the first substance to form an in situ barrier.

16. The semiconductor structure of claim 14, wherein the inhibiting layer includes a layer of zirconium with a thickness of about 5 Angstroms to about 40 Angstroms.

17. The semiconductor structure of claim 14, wherein the inhibiting layer includes a layer of zirconium with a thickness of about 10 Angstroms to about 30 Angstroms.

18. The semiconductor structure of claim 14, wherein the inhibiting layer includes a layer of zirconium with a thickness of about 20 Angstroms.

19. The semiconductor structure of claim 14, wherein the inhibiting layer includes a representative metal that includes aluminum.

20. The semiconductor structure of claim 14, wherein the inhibiting layer includes a layer of aluminum with a thickness of about 5 Angstroms to about 40 Angstroms.

21. The semiconductor structure of claim 14, wherein the inhibiting layer includes a layer of aluminum with a thickness of about 20 Angstroms to about 30 Angstroms.

22. The semiconductor structure of claim 14, wherein the inhibiting layer includes a layer of aluminum with a thickness of about 20 Angstroms.