Differential analog filter

• US 20060255997A1
• Filed: 04/04/2006
• Published: 11/16/2006
• Est. Priority Date: 04/08/2005
• Status: Abandoned Application

• Current Assignee: M/A-Com Eurotec BV (TE Connectivity Limited)
• Original Assignee: M/A-Com Incorporated and M/A-Com Eurotec BV
• Inventors: Quilligan, Gerard, Mohamed Ahmed, Walid Khairy, Carey, Eoin, Sheehy, Paul B., Li, Chin
• Application Number:
  US11/398,286
• Publication Number:
  US 20060255997A1
• Time in Patent Office: Days
• US Class Current: 341/156
• CPC Class Codes: H03F 1/26 Modifications of amplifiers to reduce influence of noise generated by amplifying elements
• CPC Class Codes: H03F 2200/331 Sigma delta modulation being used in an amplifying circuit
• CPC Class Codes: H03F 2203/45356 the AAC comprising one or more op-amps, e.g. IC-blocks
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 11/245 using field-effect transistor
• CPC Class Codes: H03M 1/0854 of quantisation noise
• CPC Class Codes: H03M 1/66 Digital/analogue converters H03M1/001 – H03M1/10 take precedence
• CPC Class Codes: H04W 52/52 using AGC [Automatic Gain Control] circuits or amplifiers

Abstract

A differential analog filter includes a differential input that includes a first input node and a second input node and a differential output that includes a first output node and a second output node. A fully differential amplifier includes a non-inverting input node and an inverting input node coupled to the differential input. The fully differential amplifier includes a non-inverting output node and an inverting output node coupled to the differential output. A first feedback network is coupled between the non-inverting output node and the inverting input node of the fully differential amplifier. A second feedback network is coupled between the inverting output node and the non-inverting input node of the fully differential amplifier.

Claims

1. A differential analog filter, comprising:

a differential input comprising a first input node and a second input node;

a differential output comprising a first output node and a second output node;

a fully differential amplifier comprising a non-inverting input node and an inverting input node coupled to said differential input, said fully differential amplifier comprising a non-inverting output node and an inverting output node coupled to said differential output;

a first feedback network coupled between said non-inverting output node and said inverting input node of said fully differential amplifier; and

a second feedback network coupled between said inverting output node and said non-inverting input node of said fully differential amplifier.

2. The differential analog filter of claim 1, further comprising:

a first input network coupled between said first input node and said first feedback network;

a first output network coupled between said non-inverting output node and said first output node;

a second input network coupled between said second input node and said second feedback network; and

a second output network coupled between said inverting output node and said second output node.

3. The differential analog filter of claim 2, wherein said first input network, said first output network, and said first feedback network are electrically symmetric with said second input network, said second output network, and said second feedback network.

4. The differential analog filter of claim 2, wherein each of said first and second feedback networks comprise a first resistor (R₁) and a first capacitor (C₁), said first and second input networks comprise said first resistor (R₁) and a second capacitor (C₂), and said first and second output networks comprise said first resistor (R₁) and a third capacitor (C₃), wherein said first resistor (R₁), said first capacitor (C₁), said second capacitor (C₂), and said third capacitor (C₃) are selected according to the relationships:

$\begin{array}{c}{C}_1=\frac{1}{3<br><br>{\mathrm{\omega <br><br>}}_n<br><br>R_1<br><br>Q}\\ C_2=\frac{1}{{\mathrm{\omega <br><br>}}_n<br><br>R_1}<br><br><br><br>\mathrm{and}\\ C_3=\frac{1}{R_1<br><br>\mathrm{\sigma <br><br>}}\end{array}$

and wherein a transfer function H(s) of said differential analog filter is defined as;

$H<br><br>\left(s\right)=\frac{{\mathrm{\omega <br><br>}}_n}{s^2+\frac{{\mathrm{\omega <br><br>}}_n}{Q}+{\mathrm{\omega <br><br>}}_n}·<br><br>\frac{\mathrm{\sigma <br><br>}}{s+\mathrm{\sigma <br><br>}}.$

5. The differential analog filter of claim 4, wherein said electrically symmetric first and second input networks, first and second output networks, and first and first and second feedback networks define a differential active resistor-capacitor (RC) third-order Bessel filter.

6. The differential analog filter of claim 1, further comprising a trimmable resistor module coupled to said fully differential amplifier.

7. The differential analog filter of claim 6, wherein said trimmable resistor module comprises:

a resistor;

a logic controlled switch coupled in parallel with said resistor;

a comparator coupled to said logic controlled switch, wherein said comparator output controls whether said logic controlled switch is in a conducting or non-conducting state;

a first input node coupled to said comparator to receive a reference voltage; and

a second input node coupled to said comparator to receive a threshold voltage;

wherein said comparator is to activate said logic controlled switch when said threshold voltage exceeds said reference voltage.

8. The differential analog filter of claim 7, further comprising:

a reference resistor coupled to said second input node of said comparator; and

a current source coupled to said second input node of said comparator, said current source to drive a reference current through said reference resistor to generate said threshold voltage.

9. The differential analog filter of claim 6, wherein said trimmable resistor module comprises:

a plurality of resistors connected in series;

a plurality of logic controlled switches, each of said plurality of logic controlled switches coupled in parallel with each of said plurality of resistors;

a plurality of comparators, each coupled to a corresponding one of said plurality of logic controlled switches, wherein each of said plurality of comparators output controls a conducting or non-conducting state of said corresponding one of said plurality of logic controlled switches;

a plurality of first input nodes coupled to a corresponding plurality of first input nodes of each said plurality of comparators to receive a plurality of different reference voltages; and

a second input node coupled to each of said plurality of comparators to receive a threshold voltage;

wherein any one of said comparators is to activate a corresponding one of said plurality of logic controlled switches when said threshold voltage of said comparator exceeds said reference voltage.

10. The differential analog filter of claim 9, further comprising:

a reference resistor coupled to said second input node; and

a current source coupled to said second input node to drive a reference current through said reference resistor to generate said threshold voltage.

11. A polar modulation transmitter system, comprising:

a baseband processor to dynamically bias a driver module; and

a differential analog filter coupled to said baseband processor, said differential analog filter comprising;

a differential input comprising a first input node and a second input node;

a differential output comprising a first output node and a second output node;

a fully differential amplifier comprising a non-inverting input node and an inverting input node coupled to said differential input, said fully differential amplifier comprising a non-inverting output node and an inverting output node coupled to said differential output;

a first feedback network coupled between said non-inverting output node and said inverting input node of said fully differential amplifier; and

a second feedback network coupled between said inverting output node and said non-inverting input node of said fully differential amplifier.

12. The system of claim 11, wherein said differential analog filter further comprises:

a first input network coupled between said first input node and said first feedback network;

a first output network coupled between said non-inverting output node and said first output node;

a second input network coupled between said second input node and said second feedback network; and

a second output network coupled between said inverting output node and said second output node.

13. The system of claim 12, wherein first input network, said first output network, and said first feedback network are electrically symmetric with said second input network, said second output network, and said second feedback network.

14. The system of claim 12, wherein each of said first and second feedback networks comprise a first resistor (R₁) and a first capacitor (C₁), said first and second input networks comprise said first resistor (R₁) and a second capacitor (C₂), and said first and second output networks comprise said first resistor (R₁) and a third capacitor (C₃), wherein said first resistor (R₁), said first capacitor (C₁), said second capacitor (C₂), and said third capacitor (C₃) are selected according to the relationships:

$\begin{array}{c}{C}_1=\frac{1}{3<br><br>{\mathrm{\omega <br><br>}}_n<br><br>R_1<br><br>Q}\\ C_2=\frac{1}{{\mathrm{\omega <br><br>}}_n<br><br>R_1}<br><br><br><br>\mathrm{and}\\ C_3=\frac{1}{R_1<br><br>\mathrm{\sigma <br><br>}}\end{array}$

and wherein a transfer function H(s) of said differential analog filter is defined as;

$H<br><br>\left(s\right)=\frac{{\mathrm{\omega <br><br>}}_n}{s^2+\frac{{\mathrm{\omega <br><br>}}_n}{Q}+{\mathrm{\omega <br><br>}}_n}·<br><br>\frac{\mathrm{\sigma <br><br>}}{s+\mathrm{\sigma <br><br>}}.$

15. The system of claim 14, wherein said electrically symmetric first and second input networks, first and second output networks, and first and first and second feedback networks define a differential active resistor-capacitor (RC) third-order Bessel filter.

16. The system of claim 11, wherein said first and second feedback networks each comprise a trimmable resistor module.

17. The system of claim 16, wherein said trimmable resistor module further comprises:

a resistor;

a logic controlled switch coupled in parallel with said resistor;

a comparator coupled to said logic controlled switch, wherein said comparator output controls whether said logic controlled switch is in a conducting or non-conducting state;

a first input node coupled to said comparator to receive a reference voltage; and

a second input node coupled to said comparator to receive a threshold voltage;

wherein said comparator is to activate said logic controlled switch when said threshold voltage exceeds said reference voltage.

18. The system of claim 17, wherein said differential analog filter further comprises:

a reference resistor coupled to said second input node of said comparator; and

a current source coupled to said second input node of said comparator, said current source to drive a reference current through said reference resistor to generate said threshold voltage.

19. The system of claim 16, wherein said trimmable resistor module further comprises:

a plurality of resistors connected in series;

a plurality of logic controlled switches, each of said plurality of logic controlled switches coupled in parallel with each of said plurality of resistors;

a plurality of comparators, each coupled to a corresponding one of said plurality of logic controlled switches, wherein each of said plurality of comparators output controls a conducting or non-conducting state of said corresponding one of said plurality of logic controlled switches;

a plurality of first input nodes coupled to a corresponding plurality of first input nodes of each said plurality of comparators to receive a plurality of different reference voltages; and

a second input node coupled to each of said plurality of comparators to receive a threshold voltage;

wherein any one of said comparators is to activate a corresponding one of said plurality of logic controlled switches when said threshold voltage of said comparator exceeds said reference voltage.

20. The system of claim 19, wherein said differential analog filter further comprises:

a reference resistor coupled to said second input node; and

a current source coupled to said second input node to drive a reference current through said reference resistor to generate said threshold voltage.

21. A method to filter a differential analog signal, comprising:

receiving a differential input signal comprising first and second input signal components at respective first and second input nodes;

coupling said differential input signal to a differential input of a fully differential amplifier, said fully differential amplifier comprising a non-inverting input node and an inverting input node coupled to said differential input signal;

providing a differential output signal comprising first and second output signal components at a differential output of said fully differential amplifier to respective first and second output nodes, said fully differential amplifier comprising a non-inverting output node and an inverting output node coupled to said differential output signal;

providing a first feedback signal through a first feedback network coupled between said non-inverting output node and said inverting input node of said fully differential amplifier; and

providing a second feedback signal through a second feedback network coupled between said inverting output node and said non-inverting input node of said fully differential amplifier.

22. The method of claim 21, comprising:

receiving said first input signal component at a first input network coupled between said first input node and said first feedback network;

providing said first output signal component to said first output node;

receiving said second input signal component at a second input network coupled between said second input node and said second feedback network; and

providing said second output signal component to said second output node.

23. The method of claim 22, comprising:

trimming a resistor element in said first and second input networks, first and second output networks, or first and second feedback networks.

24. The method of claim 23, comprising:

comparing a threshold voltage to a reference voltage;

coupling a resistor to any one of said first and second input networks, firs and second output networks, or first and second feedback networks when said threshold voltage exceeds said reference voltage.

25. The method of claim 24, comprising:

driving a current through a reference resistor; and

generating said threshold voltage.