Semiconductor package and manufacturing method thereof

• US 20060261458A1
• Filed: 11/12/2003
• Published: 11/23/2006
• Est. Priority Date: 11/12/2003
• Status: Abandoned Application

• Current Assignee: Amkor Technology Incorporated
• Original Assignee: Amkor Technology Incorporated
• Inventors: Paek, Jong Sik, Seo, Seong Min, Kim, Jin Seong
• Application Number:
  US10/712,839
• Publication Number:
  US 20060261458A1
• Time in Patent Office: Days
• US Class Current: 257/680
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 25/167 comprising optoelectronic devices, e.g. LED, photodiodes
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14634 Assemblies, i.e. Hybrid structures
• CPC Class Codes: H01L 31/0203 Containers; Encapsulations , e.g. encapsulation of photodiodesfor photovoltaic devices H01L31/048; for organic photosensitive devices H10K30/80

Abstract

A semiconductor package and manufacturing method thereof are disclosed. The semiconductor package includes a substrate having an image sensor die, window, a glass, and solder balls. Not only the substrate having the window is attached to the upper side of the image sensor die, but also one side of the substrate extends and is bent so that the one side of the substrate is attached to the lower side of the image sensor die, thereby reducing the thickness and width of the semiconductor package. In another embodiment, at least one memory die can be stacked in an image sensor die or a substrate, so that the functions of the semiconductor package is growing multifarious and the package efficiency is increased.

Claims

1. A semiconductor package comprising:

an image sensor die comprising;

a photo sensing surface, the photo sensing surface converting lights incident from an outside into electrical signals;

bond pads formed around the photo sensing surface;

first conductive bumps formed at the bond pads;

a non-photo sensing surface opposite to the photo sensing surface; and

side surfaces, each of the side surfaces formed between the photo sensing surface and the non-photo sensing surface;

a substrate comprising;

an insulative layer comprising a window formed at an area corresponding to the photo sensing surface of the image sensor die, the insulative layer attached to the non-photo sensing surface of the image sensor die by a first adhesive;

electrically conductive patterns formed at the insulative layer and connected to the first conductive bumps, the electrically conductive patterns extending over one of the side surfaces and the non-photo sensing surface of the image sensor die; and

first holes formed at the insulative layer corresponding to the non-photo sensing surface so that the electrically conductive patterns are opened downward; and

a glass attached to the insulative layer of the substrate by a second adhesive to cover the window.

2. The semiconductor package as claimed in claim 1, wherein solder balls are attached to the first holes of the insulative layer to be connected to the electrically conductive patterns.

3. The semiconductor package as claimed in claim 1, wherein the first conductive bumps are encapsulated by an encapsulant.

4. The semiconductor package as claimed in claim 3, wherein the encapsulant is located outside of the photo sensing surface of the image sensor die and between the image sensor die and the substrate.

5. The semiconductor package as claimed in claim 3, wherein the encapsulant is made from under fill, glob top, or coating material.

6. The semiconductor package as claimed in claim 1, wherein a first curved portion having a curvature is further formed at an area corresponding to the one of the side surfaces of the image sensor die.

7. The semiconductor package as claimed in claim 1, wherein second conductive bumps are inserted into the first holes of the substrate and are connected to a first memory die.

8. The semiconductor package as claimed in claim 7, wherein the substrate is attached to the first memory die by a third adhesive.

9. The semiconductor package as claimed in claim 8, wherein the substrate has second holes formed at the insulative layer in an area corresponding to the first memory die so that the electrically conductive patterns are exposed downward, and solder balls are attached to the second holes so that the solder balls are electrically connected to the electrically conductive patterns.

10. The semiconductor package as claimed in claim 1, wherein a lower surface of the substrate corresponding to the non-photo sensing surface of the image sensor die is attached to a first memory die by a third adhesive.

11. The semiconductor package as claimed in claim 10, wherein the first memory die is connected to the electrically conductive patterns by second conductive bumps.

12. The semiconductor package as claimed in claim 11, wherein the substrate has second holes formed in the insulative layer in an area corresponding to the first memory die so that the electrically conductive patterns are exposed downward, and solder balls are attached to the second holes so that the solder balls are electrically connected to the electrically conductive patterns.

13. A semiconductor package comprising:

an image sensor die comprising;

a photo sensing surface, the photo sensing surface converting lights incident from an outside into electrical signals;

bond pads formed around the photo sensing surface;

first conductive bumps formed at the bond pads;

a non-photo sensing surface opposite to the photo sensing surface; and

side surfaces, each of the side surfaces formed between the photo sensing surface and the non-photo

sensing surface;

a substrate comprising;

an insulative layer comprising a window formed at an area corresponding to the photo sensing surface of the image sensor die;

electrically conductive patterns formed at the insulative layer and connected to the first conductive bumps, the electrically conductive patterns extending over one of the side surfaces and the non-photo sensing surface of the image sensor die; and

first holes formed at the insulative layer corresponding to the non-photo sensing surface so that the electrically conductive patterns are opened downward;

a glass attached to the insulative layer of the substrate by an adhesive to cover the window;

a first memory die electrically connected to the electrically conductive patterns; and

a second memory die electrically connected to the electrically conductive patterns.

14. The semiconductor package as claimed in claim 13, wherein the non-photo sensing surface of the image sensor die is attached to the second memory die by an adhesive.

15. The semiconductor package as claimed in claim 13, wherein an upper surface of the first memory die is attached to a third memory die by an adhesive, and the third memory die is electrically connected to the electrically conductive patterns.

16-21. -21. (canceled)

24. A semiconductor package comprising:

an image sensor die comprising;

a photo sensing surface; and

bond pads formed around the photo sensing surface;

a substrate comprising;

an insulative layer extending over at least one side surface of the image sensor die, the photo sensing surface being exposed through a window of the insulative layer; and

electrically conductive patterns electrically connected to the bond pads, the electrically conductive patterns extending over the at least one side surface of the image sensor die;

a glass attached to the insulative layer of the substrate to cover the window; and

a memory die attached to a non-photo sensing surface of the image sensor die.

22. The semiconductor package as claimed in claim 24 further comprising solder balls electrically connected to the electrically conductive patterns.

23. The semiconductor package as claimed in claim 24 wherein solder balls are electrically connected to the electrically conductive patterns through holes in the insulative layer.

25. The semiconductor package as claimed in claim 24 further comprising conductive bumps interposed between the memory die and the electrically conductive patterns.