Serial radio frequency to baseband interface with programmable clock

• US 20060262882A1
• Filed: 02/05/2004
• Published: 11/23/2006
• Est. Priority Date: 02/19/2003
• Status: Active Grant

• Current Assignee: CSR Technology Incorporated (Qualcomm, Inc.)
• Original Assignee: Robert Tso, Steve Gronemeyer
• Inventors: Tso, Robert, Gronemeyer, Steve
• Granted Patent: US 7,634,025 B2
• Time in Patent Office: Days
• US Class Current: 375/316
• CPC Class Codes: H04B 1/16 Circuits
• CPC Class Codes: H04W 88/02 Terminal devices

Abstract

An interface between an RF processing section and a baseband processing section supports general purpose message transmission as well as satellite positioning system signal sample transmission between the RF processing section and the baseband processing section. The interface includes a bi-directional message serial interface and a data serial interface. The complexity of the data serial interface may be minimized by using a single data bit signal line in the data serial interface.

Claims

1. A radio frequency (RF) to baseband interface coupling an RF section for processing RF signals to a baseband section for processing baseband signals, the interface comprising:

a bi-directional message serial interface for communicating messages between the RF section and the baseband section; and

a data serial interface for communicating data from the RF section to the baseband section.

2. The interface of claim 1, wherein the data serial interface comprises a single data bit signal line.

3. The interface of claim 1, wherein the data serial interface comprises a data clock signal line and a single data bit signal line.

4. The interface of claim 1, wherein the data serial interface comprises a data clock signal line and a data bit signal line, and wherein:

the data clock signal line carries a data clock comprising a rising edge and a falling edge;

the data bit signal line carries a data signal comprising a first data bit and a second data bit; and

the first data bit is valid on the rising edge of the data clock and the second data bit is valid on the falling edge of the data clock.

5. The interface of claim 4, wherein the first data bit is a sign bit.

6. The interface of claim 4, wherein the second data bit is a magnitude bit.

7. The interface of claim 1, wherein the message serial interface comprises a message-in signal line, a message-out signal line and a message clock signal line.

8. The interface of claim 7, wherein the message serial interface further comprises a slave-select signal line.

9. A method for interfacing a radio frequency (RF) section for processing RF signals to a baseband section for processing baseband signals, the method comprising the steps of:

serially communicating messages, on a message serial interface, bi-directionally between the RF section and the baseband section; and

serially communicating data, on a data serial interface, from the RF section to the baseband section.

10. The method of claim 9, wherein the step of serially communicating data comprises the step of serially communicating data on a single data bit signal line.

11. The method of claim 9, wherein the step of serially communicating data comprises the step of serially communicating data using a data clock signal line and a data bit signal line, and wherein:

the data clock signal line carries a data clock comprising a rising edge and a falling edge;

the data bit signal line carries a data signal comprising a first data bit and a second data bit; and

the first data bit is valid on the rising edge of the data clock and the second data bit is valid on the falling edge of the data clock.

12. The method of claim 11, wherein the first data bit is a sign bit.

13. The method of claim 11, wherein the second data bit is a magnitude bit.

14. The method of claim 9, wherein the step of serially communicating messages comprises the step of serially communicating messages using a message-in signal line, a message-out signal line and a message clock signal line.

15. A radio frequency (RF) to baseband interface coupling an RF section for processing RF signals to a baseband section for processing baseband signals, the interface comprising:

a bi-directional message serial interface for communicating between the RF section and the baseband section, the message serial interface comprising;

a message clock line;

a message-in signal line and

a message-out signal line; and

wherein the message-out signal line carries an output bit stream representing a message selected from a predefined RF section message group, the predefined RF section message group comprising an RF section power control message and an RF section test message.

16. The interface of claim 15, wherein the predefined message group further comprises an RF section programmable clock synthesizer message.

17. The interface of claim 16, wherein the programmable clock synthesizer message comprises a reference divider value.

18. The interface of claim 17, wherein the reference divider value is an integer divider value.

19. The interface of claim 17, wherein the reference divider value is a fractional divider value.

20. The interface of claim 15, wherein the predefined message group filer comprises a clock output selection message for selecting a message clock for the message clock line.

21. The interface of claim 15, wherein the message-in signal line carries an input bit stream representing a message selected from a predefined baseband section message group, the predefined baseband section message group comprising a clock status message and an analog measurement message.

22. The interface of claim 21, wherein the predefined baseband section message group further comprises a channel conversion count message.

23. The interface of claim 21, wherein the analog measurement message comprises an analog measurement message for at least one of a plurality of analog input channels.

24. The interface of claim 15, further comprising a data serial interface comprising a data clock signal line and a data bit signal line.

25. The interface of claim 24, wherein:

the data clock signal line carries a data clock comprising a rising edge and a falling edge;

the data bit signal line caries a data signal comprising a first data bit and a second data bit; and

the first data bit is valid on the rising edge of the data clock and the second data bit is valid on the falling edge of the data clock.

26. The interface of claim 25, wherein the first data bit is a sign bit, and wherein the second data bit is a magnitude bit.

27. An RF front end for a satellite positioning system receiver, the front end comprising:

an RF processing section comprising an RF input for receiving satellite positioning system signals; and

an RF to baseband interface coupled to the RF processing section, the interface comprising;

a bi-directional message serial interface for communicating messages between the RE processing section and a baseband processing section; and

a data serial interface for communicating data from the RF processing section to the baseband processing section.

28. The RF front end of claim 27, wherein the RF processing section comprises a SiRFStar®

III RF processing section.

29. The RP front end of claim 27, wherein the message serial interface comprises:

a message clock line;

a message-in signal line and a message-out signal line; and

wherein the message-out signal line carries an output bit stream representing a message selected from a predefined RF section message group.

30. The RF front end of claim 29, wherein the RF section message group comprises an RF section power control message and an RF section test message.

31. The RF front end of claim 30, wherein the predefined message group further comprises a clock output selection message for selecting a message clock for the message clock line.

32. The RF front end of claim 29, wherein the message-in signal line carries an input bit stream representing a message selected from a predefined baseband section message group, the predefined baseband section message group comprising a clock status message and an analog measurement message.

33. The RF front end of claim 32, wherein the analog measurement message comprises an analog measurement message for at least one of a plurality of analog input channels.

34. The RF front end of claim 27, wherein the data serial interface comprises a data clock signal line and a data bit signal line.

35. The RF front end of claim 34, wherein:

the data clock signal line carries a data clock comprising a rising edge and a falling edge;

the data bit signal line carries a data signal comprising a first data bit and a second data bit; and

the first data bit is valid on the rising edge of the data clock and the second data bit is valid on the falling edge of the data clock.

36. The RF front end of claim 35, wherein the first data bit is a sign bit.

37. The RF front end of claim 35, wherein the second data bit is a magnitude bit.

38. A baseband back end for a satellite positioning system receiver, the back end comprising:

a baseband processing section comprising at least one address, data, and control line for communicating with a digital device; and

an RF to baseband interface coupled to the baseband processing section, the interface comprising;

a bi-directional message serial interface for communicating messages between an RF processing section and the baseband processing section; and

a data serial interface for communicating data from the RF processing section to the baseband processing section.

39. The baseband back end of claim 38, wherein the baseband processing section comprises a SiRFStar®

III baseband processing section.

40. The RF front end of claim 38, wherein the message serial interface comprises:

a message clock line;

a message-in signal line and a message-out signal line; and

wherein the message-out signal line carries an output bit stream representing a message selected from a predefined RF section message group.

41. The baseband back end of claim 40, wherein the RF section message group comprises an RF section power control message and an RF section test message.

42. The baseband back end of claim 41, wherein the predefined message group further comprises a clock output selection message for selecting a message clock for the message clock line.

43. The baseband back end of claim 40, wherein the message-in signal line carries an input bit stream representing a message selected from a predefined baseband section message group, the predefined baseband section message group comprising a clock status message and an analog measurement message.

44. The baseband back end of claim 43, wherein the analog measurement message comprises an analog measurement message for at least one of a plurality of analog input channels.

45. The baseband back end of claim 38, wherein the data serial interface comprises a data clock signal line and a data bit signal line.

46. The baseband back end of claim 45, wherein:

the data clock signal line carries a data clock comprising a rising edge and a falling edge;

the data bit signal line carries a data signal comprising a first data bit and a second data bit; and

the first data bit is valid on the rising edge of the data clock and the second data bit is valid on the falling edge of the data clock.

47. The baseband back end of claim 46, wherein the first data bit is a sign bit.

48. The baseband back end of claim 46, wherein the second data bit is a magnitude bit.

49. A satellite positioning system receiver comprising:

an RF front end comprising an RF processing section and an RF input for receiving satellite positioning system signals;

a baseband back end comprising a baseband processing section and at least one address, data, and control line for communicating with a digital device; and

an RF to baseband interface coupled between the RF processing section and the baseband processing section, the interface comprising;

a bi-directional message serial interface for communicating messages between the RF processing section and the baseband processing section; and

a data serial interface for communicating data from the RF processing section to the baseband processing section.

50. The satellite positioning system receiver of claim 49, wherein the RF processing section comprises a SiRFStar®

III RF processing section.

51. The satellite positioning system receiver of claim 49, wherein the message serial interface comprises:

a message clock line;

a message-in signal line and a message-out signal line; and

wherein the message-out signal line carries an output bit stream representing a message selected from a predefined RF section message group.

52. The satellite positioning system receiver of claim 51, wherein the RF section message group comprises an RF section power control message and an RF section test message.

53. The satellite positioning system receiver of claim 52, wherein the predefined message group further comprises a clock output selection message for selecting a message clock for the message clock line.

54. The satellite positioning system receiver of claim 51, wherein the message-in signal line carries an input bit stream representing a message selected from a predefined baseband section message group, the predefined baseband section message group comprising a clock status message and an analog measurement message.

55. The satellite positioning system receiver of claim 54, wherein the analog measurement message comprises an analog measurement message for at least one of a plurality of analog input channels.

56. The satellite positioning system receiver of claim 49, wherein the data serial interface comprises a data clock signal line and a data bit signal line.

57. The satellite positioning system receiver of claim 56, wherein:

the data clock signal line carries a data clock comprising a rising edge and a falling edge;

the data bit signal line carries a data signal comprising a first data bit and a second data bit; and

the first data bit is valid on the rising edge of the data clock and the second data bit is valid on the falling edge of the data clock.

58. The satellite positioning system receiver of claim 57, wherein the first data bit is a sign bit.

59. The satellite positioning system receiver of claim 57, wherein the second data bit is a magnitude bit.

60. The satellite positioning system receiver of claim 49, wherein the baseband processing section comprises a SiRFStar®

III baseband processing section.