Synchronous undersampling for high-frequency voltage and current measurements

• US 20060262889A1
• Filed: 05/19/2005
• Published: 11/23/2006
• Est. Priority Date: 05/19/2005
• Status: Active Grant

• Current Assignee: MKS Instruments Incorporated
• Original Assignee: MKS Instruments Incorporated
• Inventors: Nagarkatti, Siddharth P., Kalvaitis, Tim
• Granted Patent: US 7,477,711 B2
• Time in Patent Office: Days
• US Class Current: 375/355
• CPC Class Codes: H01J 37/32082 Radio frequency generated discharge H01J37/32357, H01J37/32366, H01J37/32394 and H01J37/32403 take precedence
• CPC Class Codes: H05H 1/0081 by electric means

Abstract

A power source may generate signals (RF or microwave), when driven by a drive signal from a controller. A sensor may measure the voltage and current of the signals generated by the power source, and may generate sensor signals representative of the measured voltage and current. A sampler may be configured to undersample the sensor signals, synchronously with the drive signal that drives the power source. The sampling frequency may be a scalar multiple of the fundamental frequency of the sensor signals. At RF frequencies, either synchronous undersampling or synchronous oversampling may be performed. At microwave frequencies, synchronous undersampling may be performed.

Claims

1. An apparatus comprising:

a power source configured to generate signals in response to a drive signal;

a sensor configured to measure a voltage and a current of the signals generated by the power source, and to generate sensor signals representative of the measured voltage and current; and

a sampler configured to undersample the sensor signals synchronously with the drive signal that drives the power source.

2. The apparatus of claim 1, wherein the power source comprises an RF (radio-frequency) power source, and wherein the signals from the power source comprise RF signals.

3. The apparatus of claim 1,

wherein the sampler is configured to undersample the sensor signals at a sampling frequency f_s,

wherein each one of the sensor signals comprises a component having a fundamental frequency f, and

wherein the sampling frequency f_s is a scalar multiple of the fundamental frequency f.

4. The apparatus of claim 1, further comprising:

a controller configured to receive the undersampled sensor signals, and to generate a frequency command signal that sets a frequency; and

a drive signal generator configured to generate the drive signal at the frequency set by the frequency command signal.

5. The apparatus of claim 4, wherein the controller comprises a DSP (digital signal processor), and wherein the drive signal generator comprises a DDS (direct digital synthesizer).

6. The apparatus of claim 5,

wherein the power source comprises a power supply and a power amplifier;

and

wherein the drive signal generated by the DDS controls a switching frequency of the power amplifier.

7. The apparatus of claim 6, wherein the controller is further configured to generate a power command signal that sets a power level, and to transmit the power command signal to the power supply so as to regulate a power delivered by the signals generated by the power source.

8. The apparatus of claim 5,

wherein the sampler comprises an A/D (analog-to-digital) converter and a sample clock;

wherein the A/D converter is configured to control timing of samples in response to a timing reference provided by the sample clock; and

wherein the frequency of the sample clock is a scalar multiple of the frequency of the drive signal generated by the DDS.

9. The apparatus of claim 8, further comprising:

one or more digital mixers configured to convolve the undersampled signals from the sampler with a sine wave signal and a cosine wave signal; and

one or more CIC (cascade integrator comb) filters configured to decimate the convolved undersampled signals, thereby extracting from the undersampled signals information relating to magnitude and phase.

10. The apparatus of claim 9,

wherein each one of the CIC filters are configured to generate one of an in-phase voltage signal, an out-of-phase voltage signal, an in-phase current signal, and an out-of-phase current signal.

11. The apparatus of claim 10,

wherein the digital mixers are further configured to control timing of the convolving in response to the timing reference provided by the sample clock;

and

wherein the CIC filters are further configured to control timing of the decimation in response to the timing reference provided by the sample clock.

12. The apparatus of claim 8,

wherein each one of the sensor signals comprises a component having a fundamental frequency f;

and

wherein the sample clock is synchronous with the fundamental frequency f.

13. The apparatus of claim 1, wherein the sensor signals comprise one or more signals having a frequency that varies with time.

14. The apparatus of claim 3,

wherein at least some of the sensor signals further comprises one or more harmonics of the fundamental frequency f;

wherein the sampler is configured to sample each one of the sensor signals at a succession of sampling points, and

wherein the sampling frequency f_s is chosen so that each one of the sampling points is delayed in phase with respective to one or more successive sampling points by an amount that allows at least some of the harmonics to be picked up by the sampler during sampling.

15. The apparatus of claim 3,

wherein the sampling frequency f_s is related to the fundamental frequency f by an equation given by:

f_s=(N_samp/N_cycles)*f,

where N_cycles is an integer denoting the number of cycles over which sampling is performed by the sampler,

where N_samp is an integer denoting the number of samples obtained over a number N_cycles of cycles, and

wherein N_samp is different from N_cycles.

16. The apparatus of claim 15,

wherein N_samp is related to an integer p in accordance with a formula given by:

N_samp=2^p;

and

wherein N_cycles is related to the integer p and to another integer q in accordance with a formula given by;

N_cycles=(2^p)^q+1.

17. The apparatus of claim 16,

wherein the signals generated by the power source comprise RF signals,

wherein p=6, and

wherein q=1.

18. The apparatus of claim 16,

wherein the signals generated by the power source comprise microwave frequency signals,

wherein p=6, and

wherein q=6.

19. The apparatus of claim 15, wherein the values of N_samp and N_cycles are selected so that one or more sideband frequencies can be filtered out from at least some of the sensor signals.

20. The apparatus of claim 1, wherein the power source is further configured to generate signals at a tuned frequency within a tunable frequency range.

21. The apparatus of claim 9,

wherein the controller is further configured to receive the convolved and decimated signals from the FPGA, and to transmit the signals to a plasma chamber.

22. The apparatus of claim 21,

wherein the controller is further configured to generate a capacitance command signal and to transmit the capacitance command signal to an impedance matching network disposed between the apparatus and a plasma chamber so as to control the impedance of the impedance matching network.

23. The apparatus of claim 1, wherein the power source comprises a microwave-frequency power source, and wherein the signals from the power source comprise microwave signals.

24. An apparatus comprising:

a power source configured to generate signals when driven by a drive signal;

a sensor configured to measure a voltage and a current supplied by the signals from the power source, and to generate sensor signals representative of the measured voltage and current; and

a sampler configured to oversample the sensor signals synchronously with the drive signal.

25. The apparatus of claim 24, wherein the power source comprises an RF (radio-frequency) power source, and wherein the signals generated by the power source comprise RF signals.

26. An apparatus comprising:

means for generating signals in response to a drive signal;

sensing means for measuring a voltage and a current supplied by the signals generated in response to the drive signal, and for generating sensor signals representative of the measured voltage and current; and

sampling means for undersampling the sensor signals synchronously with the drive signal.

27. A method comprising:

measuring a voltage and a current of signals generated by a power source that is driven by a drive signal;

generating sensor signals representative of the measured voltage and current; and

undersampling the sensor signals synchronously with the drive signal that drives the signal generator.

28. The method of claim 27,

wherein the sensor signals include a component having a fundamental frequency f;

and

wherein the act of undersampling the sensor signals comprises undersampling the sensor signals at a sampling frequency f_s that is a scalar multiple of the fundamental frequency f.

29. The method of claim 28,

wherein the sensor signals further comprises one or more harmonics of the fundamental frequency f;

wherein the act of undersampling the sensor signals comprises sampling the sensor signals at a succession of sampling points that are chosen to allow at least some of the harmonics to be picked up during sampling.

30. The method of claim 29,

wherein the sampling frequency f_s is related to the fundamental frequency f by an equation given by:

f_s=(N_samp/N_cycles)*f,

where N_cycles is an integer denoting the number of cycles over which sampling is performed by the sampler,

where N_samp is an integer denoting the number of samples obtained over a number N_cycles of cycles, and

wherein N_samp is different from N_cycles.

31. A method comprising:

measuring a voltage and a current supplied by signals from a power source that is driven by a drive signal;

generating sensor signals representative of the measured voltage and current; and

oversampling the sensor signals synchronously with the drive signal that drives the signal generator.