System and method for analyzing electrical failure data

• US 20060265156A1
• Filed: 07/26/2006
• Published: 11/23/2006
• Est. Priority Date: 02/12/2003
• Status: Abandoned Application

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Major, Karl L., Eyolfson, Mark, Langworthy, Chris, Sun, Xueqing
• Application Number:
  US11/493,716
• Publication Number:
  US 20060265156A1
• Time in Patent Office: Days
• US Class Current: 702/58
• CPC Class Codes: G01R 31/318511 Wafer Test
• CPC Class Codes: G01R 31/319 Tester hardware, i.e. output processing circuits
• CPC Class Codes: G11C 2029/5604 Display of error information
• CPC Class Codes: G11C 2029/5606 Error catch memory
• CPC Class Codes: G11C 29/006 at wafer scale level, i.e. wafer scale integration [WSI]
• CPC Class Codes: G11C 29/56 External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
• CPC Class Codes: H01L 2223/54406 comprising alphanumeric information
• CPC Class Codes: H01L 2223/5442 comprising non digital, non alphanumeric information, e.g. symbols

Abstract

Some embodiments of the invention include system and method for performing a calculation on the data associated with a group of wafers. The system and method display a wafer map having map indicators representing calculation results from the calculation. Other embodiments are described and claimed.

Claims

1. A system comprising:

an input device for inputting requested information;

a controller for retrieving data associated with a group of wafers based on the requested information, each wafer in the group of wafers including a plurality of circuit dice, each of the circuit dice being located at a coordinate;

a calculating unit for performing a calculation on the data associated with the group of wafers; and

a display unit for displaying a wafer map showing results from the calculation, the wafer map including a plurality of map sections, wherein each of the map sections includes a first indicator representing a calculation result for electrical failure for the circuit dice at the same coordinate among the wafers.

2. The system of claim 1, wherein the map sections is configured for displaying the first indicator within a border of each of the map sections.

3. The system of claim 1, wherein the calculation result represented by the first indicator includes a total number of all electrical failures of a particular type.

4. The system of claim 1, wherein the calculation result represented by the first indicator includes a quantity of the circuit dice at the same coordinate with at least one electrical failure.

5. The system of claim 1, wherein the calculation result represented by the first indicator includes an average number of electrical failures of a particular type.

6. The system of claim 1, wherein the calculation result represented by the first indicator includes a mean value of the circuit dice at the same coordinate with at least one electrical failure.

7. The system of claim 1, wherein each of the map sections further include a second indicator representing the calculation result for electrical failure for the circuit dice at the same coordinate among the wafers.

8. The system of claim 1, wherein each of the map sections is configured for simultaneously displaying the first and second indicators.

9. The system of claim 1, wherein the first indicator include a symbol, and wherein the second indicator includes a number.

10. The system of claim 1, wherein the first indicator includes a symbol, and wherein the second indicator includes a color.

11. The system of claim 1, wherein the first indicator include a number, and wherein the second indicator includes a color.

12. The system of claim 1, wherein the calculation result represented by each of the first and second indicators includes a total number for electrical failures for the circuit dice at the same coordinate.

13. The system of claim 1, wherein the calculation result represented by each of the first and second indicators includes a mean value of circuit dice at the same coordinate with at least one electrical failure.

14. The system of claim 1, wherein the requested information includes at least one of the following:

a statistical category, failure category used during testing of the group of wafers, type of the group of wafers, and range of date of the data associated with the group of wafers.

15. The system of claim 1, wherein the calculating unit includes a combination of a memory device for holding programming instructions and a logic circuit for performing math functions.

16. A system comprising:

a tester for testing a plurality of wafers to obtain test results;

a storage unit for storing the test results; and

an analyzer for analyzing the test results, the analyzer including;

a calculating unit for performing a calculation on the test results; and

a display unit for displaying a wafer map showing results from the calculation, the wafer map including a plurality of map sections, wherein each of the map sections includes an indicator representing a calculation result for electrical failure for the circuit dice at the same coordinate among the wafers.

17. The system of claim 16, further comprising a communication interface for communicating data to and from the system.

18. The system of claim 17, wherein the communication interface includes at least one of a modem, a network card, a wireless receiver, and a wireless transmitter.

19. The system of claim 16, wherein the input device includes at least one of a keyboard, a computer mouse, and a touch pad.

20. The system of claim 16, wherein the analyzer includes a processor.

21. The system of claim 16, wherein the calculating unit includes at least one of a memory device for holding programming instructions and logic circuits for performing math functions.

22. The system of claim 16, wherein the circuit dice of the plurality of wafers include memory devices.

23. The system of claim 16, wherein the circuit dice of the plurality of wafers include processors.

24. A machine-readable medium having instructions stored thereon for causing a machine to perform a method, the method comprising:

inputting requested information;

retrieving data associated with a group of wafers based on the requested information, each wafer in the group of wafers including a plurality of circuit dice, each of the circuit dice being located at a coordinate;

performing a calculation on the data associated with the group of wafers; and

displaying a wafer map showing results from the calculation, the wafer map including a plurality of map sections, wherein each of the map sections includes an indicator representing a calculation result for electrical failure for the circuit dice at the same coordinate among the wafers.

25. The machine-readable medium of claim 24 includes a storage medium.

26. The machine-readable medium of claim 24 includes an optical disk.

27. The machine-readable medium of claim 24 includes a magnetic disk.

28. The machine-readable medium of claim 24, wherein the requested information includes at least one of a statistical category, a failure category used during testing of the wafers, a type of the wafers, and range of date of the data associated with the group of wafers.

29. The machine-readable medium of claim 24, wherein the data associated with the group of wafers includes a number of electrical failures of a failure category recorded during a test of the group of wafers.

30. The machine-readable medium of claim 24, wherein the calculation result includes at least one of a total number of electrical failures of circuit dice at the same coordinate, a number of circuit dice at the same coordinate with at least one failure, an average number of failures of circuit dice at the same coordinate, and a mean value of circuit dice at the same coordinate with at least one failure.

31. A method comprising:

inputting requested information;

retrieving data associated with a group of wafers based on the requested information, each wafer in the group of wafers including a plurality of circuit dice, each of the circuit dice being located at a coordinate;

performing a calculation on the data associated with the group of wafers; and

displaying a wafer map showing results from the calculation, the wafer map including a plurality of map sections, wherein each of the map sections includes a first indicator representing a calculation result for electrical failure for the circuit dice at the same coordinate among the wafers.

32. The method of claim 31, wherein the indicator is displayed within a border of each of the map sections.

33. The method of claim 31, wherein displaying further includes displaying a second indicator representing the calculation result for electrical failure for the circuit dice at the same coordinate among the wafers.

34. The method of claim 33, wherein each of the map sections is configured for simultaneously displaying the first and second indicators.

35. The method of claim 33, wherein displaying further includes displaying a symbol for the first indicator, and displaying a number for the second indicator.

36. The method of claim 33, wherein displaying further includes displaying a symbol for the first indicator, and displaying a color for the second indicator.

37. The method of claim 33, wherein displaying further includes displaying a symbol for the first indicator, and displaying a number for the second indicator.

38. The method of claim 33, wherein the calculation result represented by each of the first and second indicators includes a total number for electrical failures for the circuit dice at the same coordinate.

39. The method of claim 33, wherein the calculation result represented by each of the first and second indicators includes a mean value of circuit dice at the same coordinate with at least one electrical failure.

40. The method of claim 31, wherein inputting the requested information includes inputting at least one of a statistical category, failure category used during testing of the group of wafers, type of the group of wafers, and range of date of the data associated with the group of wafers.