Power semiconductor device having a voltage sustaining region that includes doped columns formed with a single ion implantation step
First Claim
1. A power semiconductor device comprising:
- a substrate of a first conductivity type;
a voltage sustaining region disposed on said substrate, said voltage sustaining region including;
an epitaxial layer having a first or second conductivity type;
at least one terraced trench located in said epitaxial layer, said terraced trench having a trench bottom and a plurality of portions that differ in width to define at least one annular ledge therebetween;
at least one doped column having a dopant of a conductivity type opposite to the conductivity type of the epitaxial layer, said doped column being formed from at least one annular doped region and another doped region diffused into one another, said at least one annular region and said another doped region being located in said epitaxial layer adjacent to and below said at least one annular ledge and said trench bottom, respectively;
a filler material substantially filling said terraced trench; and
at least one active region of a conductivity opposite to the conductivity type of the epitaxial layer disposed over said voltage sustaining region to define a junction therebetween, wherein said plurality of portions of the terraced trench includes a smallest width portion and a largest width portion, said smallest width portion being located at a depth in said epitaxial layer such that it is closer to the substrate than a largest width portion, wherein said plurality of portions of the terraced trench are coaxially located with respect to one another, wherein said plurality of portions of the terraced trench includes at least three portions that differ in width from one another to define at least two annular ledges and said at least one annular doped region includes at least two annular doped regions, and wherein a surface area of the at least two annular ledges are substantially equal to one another.
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Abstract
A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and forming a voltage sustaining region on the substrate. The voltage sustaiing region is formed in the following manner. First, an epitaxial layer is deposited on the substrate. The epitaxial layer has a first or a second conductivity type. Next, at least one terraced trench is formed in the epitaxial layer. The terraced trench has a trench bottom and a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls and bottom of the trench. A dopant of a conductivity type opposite to the conductivity type of the epitaxial layer is implanted through the barrier material lining the annular ledge and at the trench bottom and into adjacent portions of the epitaxial layer to respectively form at least one annular doped region and another doped region. The dopant is diffused in the annular doped region and the another doped region to cause the regions to overlap one another, whereby a continuous doped column is formed in the epitaxial layer. A filler material is deposited in the terraced trench to substantially fill the terraced trench. Finally, at least one region of conductivity type opposite to the conductivity type of the epitaxial layer is formed over the voltage sustaining region to define a junction therebetween.
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Citations
11 Claims
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1. A power semiconductor device comprising:
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a substrate of a first conductivity type;
a voltage sustaining region disposed on said substrate, said voltage sustaining region including;
an epitaxial layer having a first or second conductivity type;
at least one terraced trench located in said epitaxial layer, said terraced trench having a trench bottom and a plurality of portions that differ in width to define at least one annular ledge therebetween;
at least one doped column having a dopant of a conductivity type opposite to the conductivity type of the epitaxial layer, said doped column being formed from at least one annular doped region and another doped region diffused into one another, said at least one annular region and said another doped region being located in said epitaxial layer adjacent to and below said at least one annular ledge and said trench bottom, respectively;
a filler material substantially filling said terraced trench; and
at least one active region of a conductivity opposite to the conductivity type of the epitaxial layer disposed over said voltage sustaining region to define a junction therebetween, wherein said plurality of portions of the terraced trench includes a smallest width portion and a largest width portion, said smallest width portion being located at a depth in said epitaxial layer such that it is closer to the substrate than a largest width portion, wherein said plurality of portions of the terraced trench are coaxially located with respect to one another, wherein said plurality of portions of the terraced trench includes at least three portions that differ in width from one another to define at least two annular ledges and said at least one annular doped region includes at least two annular doped regions, and wherein a surface area of the at least two annular ledges are substantially equal to one another. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A power semiconductor device comprising:
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a substrate of a first conductivity type;
a voltage sustaining region disposed on said substrate, said voltage sustaining region including;
an epitaxial layer having a first or second conductivity type;
at least one terraced trench located in said epitaxial layer, said terraced trench having a trench bottom and a plurality of portions that differ in width to define a plurality of annular ledges therebetween;
at least one doped column having a dopant of a conductivity type opposite to the conductivity type of the epitaxial layer, said doped column being formed from at least one annular doped region and another doped region diffused into one another, said at least one annular region and said another doped region being located in said epitaxial layer adjacent to and below said plurality of annular ledges and said trench bottom, respectively;
a filler material substantially filling said terraced trench; and
at least one active region of a conductivity opposite to the conductivity type of the epitaxial layer disposed over said voltage sustaining region to define a junction therebetween, wherein said epitaxial layer has a given thickness and wherein said plurality of annular ledges are separated by a space substantially equal to 1/(x+1) of said given thickness, where x is equal to or greater than a number of said plurality of annular ledges formed in the voltage sustaining region. - View Dependent Claims (10, 11)
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Specification