Circuit for blowing an electrically blowable fuse in SOI technologies

• US 20060267669A1
• Filed: 05/26/2005
• Published: 11/30/2006
• Est. Priority Date: 05/26/2005
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Smith, George E. III, Robinson, Adrian O.
• Granted Patent: US 7,271,643 B2
• Time in Patent Office: Days
• US Class Current: 327/525
• CPC Class Codes: H01L 23/5256 comprising fuses, i.e. connections having their state changed from conductive to non-conductive
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An electrically blowable fuse circuit having a fuse which may be placed in a condition to be blown. The circuit includes a first transistor having a body, a source, a drain, and a gate. The source is connected to one end of the fuse and the drain is connected to ground. The first transistor further includes a controllable parasitic device in its body. A second transistor is connected to the parasitic device such that when the second transistor is turned on, the parasitic device turns on the first transistor, allowing the fuse to be blown when the fuse is placed in a condition to be blown.

Claims

1. An electrically blowable fuse circuit comprising:

a fuse which may be placed in a condition to be blown;

a first transistor having a body, a source, a drain, and a gate, said source connected to one end of said fuse and said drain connected to ground, said first transistor including a controllable parasitic device in said body; and

a second transistor connected to said parasitic device such that when said second transistor is turned on, said parasitic device turns on said first transistor, allowing said fuse to be blown when said fuse is placed in a condition to be blown.

2. The electrically blowable fuse circuit according to claim 1 wherein said first transistor is a Field-Effect Transistor (FET) Silicon-On-Insulator (SOI) device.

3. The electrically blowable fuse circuit according to claim 2 wherein said second transistor is an FET having a source, a drain, and a gate, said drain is connected to said parasitic device in said first transistor, and said gate controllably turns on said parasitic device when said fuse is to be blown.

4. The electrically blowable fuse circuit according to claim 1 further comprising a voltage source connected to the other end of said fuse, said voltage source adjustable to supply a high voltage when said fuse may be blown and to supply a voltage at ground potential when said fuse is not to be blown.

5. The electrically blowable fuse circuit according to claim 1 further comprising a transmission gate connected between the gate of said first transistor and ground such that the gate of said first transistor is floating when attempting to blow said fuse, and grounded when not attempting to blow said fuse.

6. The electrically blowable fuse circuit according to claim 3 further comprising a third transistor having a source, a drain and a gate, the gate of said third transistor connected to the gate of said second transistor, the drain of said third transistor connected to ground, and the source of said third transistor connected to the drain of said second transistor and said parasitic device such that the first transistor is discharged when not blowing said fuse.

7. A method for blowing an electrically blowable fuse, said method comprising:

connecting the source of a first transistor having a body, a source, a drain, a gate, and a controllable parasitic device in said body, to one end of said fuse, and connecting the drain to ground;

connecting a second transistor to said parasitic device such that when said second transistor is turned on, said parasitic device turns on said first transistor;

placing a voltage on the other end of said fuse, said voltage being sufficient to blow said fuse when said first transistor is turned on; and

turning on said second transistor.

8. The method according to claim 7 wherein said first transistor is a Field-Effect Transistor (FET) Silicon-On-Insulator (SOI) device.

9. The method according to claim 8 wherein said second transistor is an FET having a source, a drain, and a gate, said method further comprising;

connecting the drain of said second transistor to said parasitic device in said first transistor; and

controlling the gate of said second transistor to controllably turn on said parasitic device when said fuse is to be blown.

10. The method according to claim 7 further comprising varying said voltage to ground potential when said fuse is not to be blown.

11. The method according to claim 7 further comprising connecting a transmission gate between the gate of said first transistor and ground such that the gate of said first transistor is floating when attempting to blow said fuse, and grounded when not attempting to blow said fuse.

12. The method according to claim 9 further comprising:

connecting the gate of a third transistor having a source, a drain and a gate, to the gate of said second transistor;

connecting the drain of said third transistor to ground; and

connecting the source of said third transistor to the drain of said second transistor and said parasitic device,

such that the first transistor is discharged when not blowing said fuse.