Applying non-homogeneous properties to multiple video processing units (VPUs)

• US 20060267992A1
• Filed: 05/27/2005
• Published: 11/30/2006
• Est. Priority Date: 05/27/2005
• Status: Active Grant

• Current Assignee: ATI Technologies ULC (Advanced Micro Devices, Inc.)
• Original Assignee: ATI Technologies ULC (Advanced Micro Devices, Inc.)
• Inventors: Kelley, Timothy M., Gotwalt, David A., Campbell, Jonathan L.
• Granted Patent: US 8,054,314 B2
• Time in Patent Office: Days
• US Class Current: 345/502
• CPC Class Codes: G06F 9/30069 Instruction skipping instructions, e.g. SKIP
• CPC Class Codes: G06F 9/30072 to perform conditional operations, e.g. using predicates or guards
• CPC Class Codes: G06F 9/3885 using a plurality of independent parallel functional units

Abstract

A system and method for applying non-homogeneous properties to multiple video processing units (VPUs) in a multiple VPU system are described. Respective VPUs in the system cooperate to produce a frame to be displayed. In various embodiments, data output by different VPUs in the system is combined, or merged, or composited to produce a frame to be displayed. In load balancing modes, each VPU in the system performs different tasks as part of rendering a same frame, and therefore typically executes different commands. In various embodiments, efficiency of the system is enhanced by forming a single command buffer for execution by all of the VPUs in the system even though each VPU may have a different set of commands to execute in the command buffer.

Claims

1. A multiprocessor system, comprising:

a plurality of special purpose processors that perform different portions of a related processing task; and

a driver coupled to control each of the processors, including distributing a set of commands that cause each of the processors to perform the portions of the related task, wherein the set of commands includes all commands to be executed by each processor, and wherein the set of commands includes at least one subset of predicated commands to be executed by a subset of the processors, the subset of predicated commands preceded by a predication command identifying the subset of processors that are to execute the subset of commands.

2. An apparatus comprising multiple video processing units, the apparatus substantially as shown and described.

3. A system comprising:

a plurality of processors each configurable to receive a set of commands and data that directs the processor to perform a task;

at least one driver configurable to build the set of commands and data such that each of the plurality of processors receives the same set of commands and data, and each performs different portions of the task.

4. The system of claim 3, wherein the plurality of processors comprise video processing units (VPUs) and wherein the task comprises a rendering task.

5. The system of claim 3, wherein each of the plurality of processors comprises a command processor (CP) including an unique execution engine microcode image for each processor that includes information distinguishing each processor from other processors.

6. The system of claim 5, wherein each processor'"'"'s CP determines whether a sequence of commands in the set of commands and data is relevant to the processor, and wherein each processor'"'"'s CP processes relevant commands and ignores irrelevant commands.

7. The system of claim 5, wherein the information includes a device identification.

8. The system of claim 3, wherein the set of commands and data comprises a command buffer in which a predicated execution command precedes commands that are intended to be executed by less than all of the plurality of processors, wherein each of the plurality of processors receives the same command buffer, and each performs different portions of the task.

9. The system of claim 3, wherein the set of commands and data comprises a command buffer including packets, wherein specific packet types are defined for each processor, wherein each of the plurality of processors receives the same command buffer, and each performs different portions of the task as specified by the packet types.

10. The system of claim 8, further comprising a use interface for programming the system to perform in one or more of a plurality of modes, wherein the plurality of modes comprise compositing modes for compositing results of different portions of the tasks, modes of task sharing, modes of load balancing, and modes of antialiasing.

11. A system comprising:

a plurality of processors each configurable to receive a command buffer comprising data and commands that direct the processor to perform a task.

12. The system of claim 11, further comprising at least one driver configurable to build the command buffer such that a predicated execution command precedes commands that are intended to be executed by less than all of the plurality of processors, wherein each of the plurality of processors receives the same command buffer, and each performs different portions of the task.

13. The system of claim 11, wherein the predicated execution command includes a device identification identifying a processor intended to execute a series of commands following the predicated execution command.

14. The system of claim 11, wherein the predicated execution command includes a number of subsequent commands, wherein the number of subsequent commands is executed by one or more processors and intended to execute the subsequent commands, and ignored by other processor.

15. The system of claim 11, wherein the driver is further configurable to balance work loads among the plurality of processors through predicated execution commands.

16. A multi-processor method, comprising:

building a common set of commands and data that refer to a processing task;

receiving the common set of commands and data in each of a plurality of processors; and

various processors of the plurality of processors interpreting the common set of commands and data differently so as to perform a designated portions of the processing task.

17. The method of claim 16, further comprising:

each of the plurality of processors reading a predicated command in the common set of commands and data;

each of the plurality of processors determining whether subsequent commands are intended to be executed by the processor based on information in the predicated command; and

each of the plurality of processors determining a number of subsequent commands to be executed based on information in the predicated command.

18. The method of claim 17, further comprising:

each of the plurality of processors executing the number of subsequent commands intended to be executed by the processor, and

each of the plurality of processors ignoring the number of subsequent commands not intended to be executed by the processor.

19. The method of claim 16, wherein building the common set of commands and data that refer to a processing task comprises:

determining whether a command is predicated, wherein a predicated command is intended to be executed by less than all of the plurality of processors; and

if the command is determined to be predicated, inserting a predication header in the common set that indicates one or more subsequent commands is intended to be executed by less than all of the plurality of processors.

20. The method of claim 19, further comprising:

determining whether a number of subsequent commands intended to be executed by less than all of the plurality of processors is known; and

if the number is known, inserting the number in the predication header.

21. The method of claim 19, further comprising:

determining whether a number of subsequent commands intended to be executed by less than all of the plurality of processors is known; and

if the number is not known, adding a subsequent predicated command to the common set;

determining whether there are additional subsequent predicated commands;

if there are no more additional subsequent predicated commands, determining the number; and

inserting the number in the predication header.

22. The method of claim 16, wherein the common set comprises command packets, and wherein interpreting comprises determining whether a packet type is a type defined for a specific processor.

23. The method of claim 22, further comprising, if the packet type is defined for a specific processor, the specific processor executing commands in the packet.

24. The method of claim 22, wherein building the common set comprises:

inserting a device identification header in a command packet, wherein the device identification header indicates a specific processor; and

inserting commands after the device identification header.

40. A digital image generated by the method of claim 16.

25. A computer readable medium having instructions stored thereon which, when executed in a multi-processor system, cause components of the system to perform a method comprising:

building a common set of commands and data that refer to a processing task;

receiving the common set of commands and data in each of a plurality of processors; and

various processors of the plurality of processors interpreting the common set of commands and data differently so as to perform a designated portions of the processing task.

26. The medium of claims 25, wherein the method further comprises:

each of the plurality of processors reading a predicated command in the common set of commands and data;

each of the plurality of processors determining whether subsequent commands are intended to be executed by the processor based on information in the predicated command; and

each of the plurality of processors determining a number of subsequent commands to be executed based on information in the predicated command.

27. The medium of claim 26, wherein the method further comprises:

each of the plurality of processors executing the number of subsequent commands intended to be executed by the processor; and

each of the plurality of processors ignoring the number of subsequent commands not intended to be executed by the processor.

28. The medium of claim 25, wherein building the common set of commands and data that refer to a processing task comprises:

determining whether a command is predicated, wherein a predicated command is intended to be executed by less than all of the plurality of processors; and

if the command is determined to be predicated, inserting a predication header in the common set that indicates one or more subsequent commands is intended to be executed by less than all of the plurality of processors.

29. The medium of claim 28, wherein the method further comprises:

determining whether a number of subsequent commands intended to be executed by less than all of the plurality of processors is known; and

if the number is known, inserting the number in the predication header.

30. The medium of claim 28, wherein the method further comprises:

determining whether a number of subsequent commands intended to be executed by less than all of the plurality of processors is known; and

if the number is not known, adding a subsequent predicated command to the common set;

determining whether there are additional subsequent predicated commands;

if there are no more additional subsequent predicated commands, determining the number; and

inserting the number in the predication header.

31. The medium of claim 25, wherein the common set comprises command packets, and wherein interpreting comprises determining whether a packet type is a type defined for a specific processor.

32. The medium of claim 31, wherein the method further comprises, if the packet type is defined for a specific processor, the specific processor executing commands in the packet.

33. The medium of claim 31, wherein building the common set comprises:

inserting a device identification header in a command packet, wherein the device identification header indicates a specific processor, and

inserting commands after the device identification header.

34. A multiple video processing unit (VPU) processing method, comprising:

forming a single command buffer that includes commands and data for each of the multiple VPUs, wherein the commands and data related to a task to be shared by the multiple VPUs, and wherein the single command buffer is formed so as to be interpreted individually by each of the multiple VPUs;

making the single command buffer available to each of the multiple VPUs concurrently so that each of the multiple VPUs concurrently executes respective commands in the single command buffer.

35. The method of claim 34, further comprising forming the command buffer to cause a selected one of the multiple VPUs to execute particular commands based on a plurality of factors, including an operating mode.

36. A method for generating a command buffer in a multiple video processing unite (VPU) system;

assembling a set of commands and data, including a predicated execution command that precedes commands that are intended to be executed by less than all of the multiple VPUs, wherein each of the multiple VPUs receives the same set of commands and data in the command buffer.

37. A video processing card configurable to receive video data from a video application and create a single command buffer to be executed by multiple video processing units (VPUs) to generate frame data.

38. The video processing card of claim 37, comprising a VPU that is one of the multiple VPUS.

39. A video processing unit (VPU) configurable to receive a command buffer that includes commands to be executed by the VPU and commands to be executed by other VPUS, wherein the VPU executes only the commands to be executed by the VPU.

41. A multiple video processing unit (VPU) method, comprising:

receiving video data from a video application; and

generating commands and data for the multiple VPUs to execute the video application, wherein the commands and data comprise a single command buffer that includes information interpretable by each of the multiple VPUs to indicate a particular subset of the commands and data applicable to a respective VPU.

42. A computer readable medium having instruction stored thereon which, when processed, are adapted to create a circuit capable of performing a method comprising:

building a common set of commands and data that refer to a processing task;

making the common set of commands and data available to each of a plurality of processors; and

interpreting the common set of commands and data in a different way for each of the plurality of processor so that each of the plurality of processors performs a predesignated portion of the processing task.

43. A computer readable medium having instruction stored t hereon which, when processed, are adapted to create a circuit capable of performing a method comprising:

receiving a common set of commands and data that refer to a video processing task, wherein the common set of commands and data includes subsets of commands and data to be executed by different processing units;

interpreting the common set of commands and data;

so as to use only a particular subset to perform a predesignated portion of the video processing task.