Allocating Memory on a Spatial Light Modulator

• US 20060268022A1
• Filed: 05/11/2006
• Published: 11/30/2006
• Est. Priority Date: 05/20/2003
• Status: Active Grant

• Current Assignee: Syndiant Incorporated
• Original Assignee: Kagutech Ltd.
• Inventors: Guttag, Karl M.
• Granted Patent: US 8,189,015 B2
• Time in Patent Office: Days
• US Class Current: 345/691
• CPC Class Codes: G06F 3/147 using display panels
• CPC Class Codes: G09G 2300/0809 Several active elements per pixel in active matrix panels
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2310/0221 with use of split matrices G09G3/3644 and G09G3/3666 take precedence
• CPC Class Codes: G09G 2310/0275 Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
• CPC Class Codes: G09G 3/2014 by modulation of the duration of a single pulse during which the logic level remains constant
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/34 by control of light from an independent source
• CPC Class Codes: G09G 3/346 based on modulation of the reflection angle, e.g. micromirrors micromirrors devices per se G02B26/0833
• CPC Class Codes: G09G 5/10 Intensity circuits

Abstract

The present invention provides a various methods, systems and devices for controlling light modulating elements and/or spatial light modulators. In some embodiments of the present invention, a recursive feedback method is used to control light modulating elements and/or spatial light modulators.

Claims

1-89. -89. (canceled)

90. A method comprising the following steps:

(a) providing available memory on a spatial light modulator; and

(b) allocating said available memory for data on said spatial light modulator, wherein at least some of the space allocated is based on the length of time that said data needs to stay resident for processing on said spatial light modulator and wherein said data is processed to control electrodes on said spatial light modulator.

91. The method of claim 90, wherein said data are a bit position array that partially specifies at least one pulse width on said control electrodes.

92. The method of claim 91, wherein different bit positions of said plurality of bit positions require different amounts of said available memory.

93. The method of claim 92, wherein the amount of said available memory required for said bit positions is based on the amount of time that a selected bit position of a selected pixel of said plurality of pixels must stay resident on said spatial light modulator.

94. The method of claim 91, wherein buffer sizes for each of said plurality of bit positions is variable.

95. The method of claim 91, wherein the number of said bit positions is a variable number.

96. The method of claim 91, wherein said bit positions comprise a two-dimensional array of bit positions.

97. The method of claim 96, wherein one dimension of said array is based on the line width of said spatial light modulator.

98. The method of claim 90, wherein step (b) employs a non-circular buffer.

99. The method of claim 90, wherein step (b) employs a circular buffer.

169. The method of claim 90, wherein said data is stored in said memory using different types of bits and wherein the amount of space allocated for each type of bit is based on the type of bit.

100. The method of 90, wherein said data is fetched from an external memory and sent on a backplane for said spatial light modulator in coordination with step (b).

101. A system comprising:

means for providing available memory on a spatial light modulator; and

means for allocating said available memory for data on said spatial light modulator, wherein at least some of the space allocated is based on the length of time that said data needs to stay resident on said spatial light modulator for processing and wherein said data is processed to control electrodes on said spatial light modulator.

170. The system of claim 101, wherein said data is stored in said memory using different types of bits and wherein the amount of space allocated for each type of bit is based on the type of bit.

102. A device comprising:

a backplane comprising an instruction memory for holding instructions for controlling at least one pulse width on each light modulating element of a spatial light modulator.

103. The device of claim 102, wherein said backplane further comprises a RAM for said instruction memory.

104. The device of claim 103, wherein said instruction memory is ROM.

105. The device of claim 102, wherein said instructions are for controlling memory pointers for reading a plurality of bit positions that control each of said light modulating elements.

106. The device of claim 105, wherein said memory pointers move in a circular buffer fashion.

107. The device of claim 105, wherein changing initial contents of said memory pointers modifies the timing and/or number of pulse widths driving each of said light modulating elements.

108. The device of claim 105, wherein said backplane further comprises a pointer memory array and said memory pointers are held in said pointer memory array.

109. The device of claim 105, wherein at least some of said memory pointers point to the same bit position of said plurality of bit positions.

110. The device of claim 109, wherein said instruction memory includes said pointer memory array.

111. The device of claim 102, wherein said backplane further comprises memory pointers, wherein at least some of said memory pointers are modified by a common set of logic controlled by said instructions.

112. The device of claim 102, wherein said instruction memory holds a sequence of operations comprising said instructions, wherein said sequence of operations repeats at a periodic rate.

113. The device of claim 112, wherein said periodic rate is based on a line rate of a display process of said spatial light modulator.

114. The device of claim 102, wherein changing said instructions modifies the timing and/or number of pulse widths driving each of said light modulating elements.

115. The device of claim 102, wherein changing said instructions modifies the number of bit positions per pixel value.

116. The device of claim 102, further comprising means for reloading said instruction memory while said device continues to control said spatial light modulator.

117. The device of claim 102, wherein said holding instructions control one or more array of processing elements.

118. The device of claim 117, further comprising said processing elements.

119. The device of claim 102, wherein said instructions control pointers to a MRAM memory array.

120. A device comprising:

a backplane for a spatial modulator;

a plurality of pointers to bit position arrays on said backplane; and

pointer controller means for controlling said plurality of pointers.

121. The device of claim 120, wherein said pointer controller means is located on said backplane.

122. The device of claim 120, wherein said pointer controller means is external on said backplane.

123. The device of claim 120, wherein a portion of said pointer controller means is on said backplane and a portion of said pointer controller means is external on said backplane.

124. The device of claim 120, wherein said pointer controller means comprises a sequencing means for manipulating said pointers in sequence.

125. The device of claim 120, wherein said pointer controller means controls at least one circular buffer on said backplane.

126-168. -168. (canceled)