DESIGN-BASED METHOD FOR GROUPING SYSTEMATIC DEFECTS IN LITHOGRAPHY PATTERN WRITING SYSTEM

• US 20060269120A1
• Filed: 05/15/2006
• Published: 11/30/2006
• Est. Priority Date: 05/13/2005
• Status: Active Grant

• Current Assignee: Applied Materials Israel Limited (Applied Materials Incorporated)
• Original Assignee: Applied Materials Israel Limited (Applied Materials Incorporated)
• Inventors: Almogy, Gilad, NEHMADI, YOUVAL, Shimsht, Rinat, Svidenko, Vicky, Ravid, Erez, Bokobza, Ofer, Ben-Porath, Ariel
• Granted Patent: US 7,760,347 B2
• Time in Patent Office: Days
• US Class Current: 382/145
• CPC Class Codes: G03F 1/84 Inspecting
• CPC Class Codes: G03F 7/7065 Defects, e.g. optical inspection of patterned layer for defects

Abstract

Methods and apparatus for categorizing defects on workpieces, such as semiconductor wafers and masks used in lithographically writing patterns into such wafers are provided. For some embodiments, by analyzing the layout in the neighborhood of the defect, and matching it to similar defected neighborhoods in different locations across the die, defects may be categorized by common structures in which they occur.

Claims

1. A method for categorizing defects in fabrication of a semiconductor wafer, comprising:

determining locations of defects on the semiconductor wafer;

determining if a set of defect areas, each surrounding a different one of the defects, each contain one or more common structural elements; and

if so, categorizing the defects surrounded by the set of defect areas, as corresponding to the common structural elements.

2. The method of claim 1, further comprising:

providing, in a graphical format, an indication of different numbers of defects categorized as corresponding to different sets of one or more structural elements.

3. The method of claim 1, further comprising generating a defect map indicating locations on the wafer of the defects categorized as corresponding to the common structural elements.

4. The method of claim 1, further comprising selecting a subset of defects categorized as corresponding to the common structural elements for sampling.

5. The method of claim 4, wherein selecting the subset of defects comprises automatically selecting a limited number of the defects categorized as corresponding to the common structural elements for sampling under program control.

6. The method of claim 4, wherein selecting the subset of defects comprises automatically selecting a limited number of the defects categorized as corresponding to the common structural elements for sampling, based on one or more criteria specified by a user.

7. The method of claim 1, wherein determining locations of defects on the semiconductor wafer comprises aligning a defect map generated via an inspection tool with a computer generated model of the wafer.

8. A method for selecting defects in fabrication of a semiconductor wafer for later inspection, comprising:

generating a set of defect clips, each surrounding a different one of the defects and comprising one or more structural elements;

for each clip, determining if the structural elements in that clip match the structural elements in another clip and, if so categorizing that clip and the other clip as corresponding to the matching structural elements; and

providing an indication of the quantity of defects, for at least some portion of the wafer, categorized as belonging different structural elements.

9. The method of claim 8, wherein the defect clips are each in a graphical format.

10. The method of claim 8, wherein each defect clip comprises a predetermined area surrounding a defect.

11. The method of claim 10, wherein the size of the predetermined area surrounding the defect is specified by a user.

12. The method of claim 8, further wherein providing an indication of the quantity of defects, for at least some portion of the wafer, categorized as belonging different structural elements, comprises generating a plot of the number of defects categorized as corresponding to different sets of one or more structural elements.

13. The method of claim 8, wherein determining if the structural elements in a clip match the structural elements in another clip comprises attempting to align at least a portion of a structural element in the clip with a portion of a structural element in the other clip.

14. The method of claim 13, wherein attempting to align at least a portion of a structural element in the clip with a portion of a structural element in the other comprises at least one of rotating or flipping at least one of the clips.

15. The method of claim 8, further comprising automatically selecting a subset of defects categorized as corresponding to the common structural elements to be inspected with a scanning electron microscope.

16. The method of claim 15, further comprising automatically inspecting the selected subset of defects with the scanning electron microscope under program control.

17. A system, comprising:

an interface, for receiving defect map indicating locations of defects on the wafer;

a defect processing component coupled to the interface, adapted to determine locations of defects on the semiconductor wafer based on the defect map, determine if a set of defect areas, each surrounding a different one of the defects, each contain one or more common structural elements and, if so, categorize the defects surrounded by the set of defect areas, as corresponding to the common structural elements.

18. The system of claim 17, wherein the defect processing system is configured to determine if a set of defect areas, each surrounding a different one of the defects, each contain one or more common structural elements by:

generating a set of defect clips, each surrounding a different one of the defects and containing one or more structural elements; and

for each clip, determining if the structural elements in that clip match the structural elements in another clip and, if so categorizing that clip and the other clip as corresponding to the matching structural elements.

19. The system of claim 17, wherein the defect processing component is further configured to provide, in a graphical format, an indication of different numbers of defects categorized as corresponding to different sets of one or more structural elements.

20. The system of claim 19, wherein:

the lithography system is configured to write structural elements into the semiconductor wafer using different combinations of focus and exposure levels; and

the defect processing component is configured to provide, in a graphical format, an indication of different numbers of defects categorized as corresponding to a common set of structural elements written using different combinations of focus and exposure levels.

21. The system of claim 17, wherein the defect processing component is integrated with the inspection system.

22. The system of claim 17, wherein the defect processing component is further configured to:

select a defect location of interest; and

automatically generate a gallery of images of the defect location in a number of different die locations printed at different focus and exposure combinations.

23. The system of claim 22, wherein the defect location of interest is specified by a user.

24. The system of claim 22, wherein the defect location of interest is automatically selected by the defect processing component.

25. A computer-readable medium containing instructions which, when executed by a processor, perform operations for categorizing defects in fabrication of a semiconductor wafer, the operations comprising:

determining locations of defects on the semiconductor wafer;

determining if a set of defect areas, each surrounding a different one of the defects, each contain one or more common structural elements; and

if so, categorizing the defects surrounded by the set of defect areas, as corresponding to the common structural elements.

26. The computer-readable medium of claim 25, wherein the operations further comprise:

providing, in a graphical format, an indication of different numbers of defects categorized as corresponding to different sets of one or more structural elements.

27. The computer-readable medium of claim 25, wherein the operations further comprise:

generating a defect map indicating locations on the wafer of the defects categorized as corresponding to the common structural elements.

28. The computer-readable medium of claim 25, wherein the operations further comprise:

automatically selecting a limited number of the defects categorized as corresponding to the common structural elements for sampling under program control.

29. The computer-readable medium of claim 25, wherein determining locations of defects on the semiconductor wafer comprises aligning a defect map generated via an inspection tool with a computer generated model of the wafer.