Optical transmission equipment and integrated circuit

• US 20060269294A1
• Filed: 02/15/2006
• Published: 11/30/2006
• Est. Priority Date: 05/31/2005
• Status: Active Grant

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi Communication Technologies, Ltd. (Hitachi, Ltd.)
• Inventors: Kikuchi, Nobuhiko
• Granted Patent: US 7,515,832 B2
• Time in Patent Office: Days
• US Class Current: 398/161
• CPC Class Codes: H04B 10/5051 using a series, i.e. cascade, combination of modulators
• CPC Class Codes: H04B 10/5053 using a parallel, i.e. shunt, combination of modulators
• CPC Class Codes: H04B 10/5055 using a pre-coder
• CPC Class Codes: H04B 10/5161 Combination of different modulation schemes
• CPC Class Codes: H04B 10/541 Digital intensity or amplitude modulation
• CPC Class Codes: H04B 10/5561 Digital phase modulation
• CPC Class Codes: H04B 10/66 Non-coherent receivers, e.g. using direct detection
• CPC Class Codes: H04L 27/2096 Arrangements for directly or externally modulating an optical carrier optical modulation H04B10/503
• CPC Class Codes: H04L 27/223 Demodulation in the optical domain optical demodulation H04B10/676

Abstract

Optical transmission equipment, capable of electrically adjusting the delay difference between a plurality of digital signal paths to be connected to a multilevel optical modulation unit or demodulation unit, having multiplexing circuits connected to the digital signal paths and a delay adjustment unit inserted in one of the digital signal paths to adjust delay of N-bit-parallel low-speed digital signals with the timing unit of a bit period of a high-speed serial digital signal to be outputted from multiplexing circuit.

Claims

1. Optical transmission equipment comprising:

an optical modulation unit including a plurality of optical modulators coupled to an internal optical transmission path; and

an electric circuit unit for generating a plurality of high-speed serial digital signal streams to be supplied to said optical modulation unit,

wherein said electric circuit unit includes;

a plurality of parallel signal paths each for transferring an N-bit-parallel low-speed digital signal stream (N is an integer more than

     1);

a plurality of multiplexing circuits each for converting the N-bit-parallel low-speed digital signal stream received from one of said parallel signal paths into a high-speed serial digital signal stream to be supplied to said optical modulation unit; and

a delay control buffer circuit inserted in at least one of said parallel signal paths to receive the N-bit-parallel low-speed digital signal stream,

wherein said delay control buffer circuit performs delay adjustment on the N-bit-parallel low-speed received digital signal stream, with the timing unit of a bit period of the high-speed serial digital signal stream or with a timing unit corresponding to an integral fraction of the bit period and outputs the resultant digital signal stream to the parallel signal path.

2. The optical transmission equipment according to claim 1, wherein said delay control buffer circuit temporarily stores the N-bit-parallel low-speed received digital signal stream as logically serially arranged data and outputs stored data beginning at a bit position selected in accordance with a preliminarily specified amount of delay adjustment as a delay adjusted N-bit-parallel low-speed digital signal stream to said signal path.

3. The optical transmission equipment according to claim 2, wherein said delay control buffer circuit comprises:

a memory for temporarily storing the N-bit-parallel received digital signal stream as said logically serially arranged data;

a write address generator for generating a write address for N-bit parallel data;

a register for storing said preliminarily specified amount of delay adjustment; and

a read address generator for generating a read address for N-bit data to be outputted to said signal path based on the write address outputted from said write address generator and on the amount of delay adjustment stored in said register.

4. The optical transmission equipment according to claim 1, wherein said electric circuit unit includes:

a clock generator for generating clock signals to be supplied to said multiplexing circuits; and

an accurate delay adjustment unit for adjusting a phase of one of said clock signals to be supplied to a specified one of the multiplexing circuits in accordance with a preliminarily specified amount of delay adjustment,

wherein each of said multiplexing circuits outputs each bit of the high-speed serial digital signal stream with a specified timing determined in accordance with the supplied clock signal.

5. The optical transmission equipment according to claim 1, wherein

at least two of said parallel signal paths include said delay control buffer circuit, and

said electric circuit unit includes:

a memory for storing the amount of delay adjustment in association with each of said parallel signal paths; and

a control unit for setting the amount of delay adjustment stored in said memory to said delay control buffer circuits.

6. The optical transmission equipment according to claim 4, wherein

at least two of said parallel signal paths include said delay control buffer circuit, and

said electric circuit unit further includes:

a memory for storing the amount of delay adjustment and the amount of clock phase control in association with each of said parallel signal paths; and

a control unit for setting the amount of delay adjustment stored in said memory to said delay control buffer circuits and the amount of clock phase control stored in said memory to said accurate delay adjustment unit.

8. The optical transmission equipment according to claim 1, wherein said electric circuit unit includes a signal synthesizing circuit for combining two of the high-speed serial digital signal streams outputted from said plurality of multiplexing circuits and outputting the resultant combination as a high-speed serial digital signal stream for optical modulation.

9. The optical transmission equipment according to claim 1, wherein

said electric circuit unit includes:

a driver circuit for receiving one of the two high-speed serial digital signal streams outputted from a pair of two of said plurality of multiplexing circuits; and

a driver circuit with inverted output for receiving the other of the two high-speed serial digital signal streams, and

wherein respective output signals from said driver circuit and said driver circuit with inverted output are supplied in parallel to one of the optical modulators included in said optical modulation unit.

10. The optical transmission equipment according to claim 1, wherein

said electric circuit unit includes an encoder for encoding at least two of low-speed digital signal streams supplied in parallel to convert into a plurality of N-bit-parallel low-speed digital signal streams, and

the N-bit-parallel low-speed digital signal streams resulting from the encoding are outputted to said parallel signal paths.

11. The optical transmission equipment according to claim 1, wherein

said electric circuit unit includes a plurality of encoders each for encoding at least two streams of low-speed digital signals supplied in parallel into a plurality of N-bit-parallel low-speed digital signal streams, and

the N-bit-parallel low-speed digital signal streams resulting from the encoding are outputted to said parallel signal paths.

12. The optical transmission equipment according to claim 9, wherein

said electric circuit unit includes:

an encoder for encoding low-speed digital signals supplied in parallel and outputting a pair of parallel low-speed digital signal streams; and

first and second splitters for dividing said pair of parallel low-speed digital signal streams outputted from the encoder into a first and second pairs of N-bit-parallel low-speed digital signal streams, and

wherein two of said multiplexing circuits connected to a first pair of parallel signal paths to which the first pair of the N-bit-parallel low-speed digital signal streams are outputted from said first splitter and two of the multiplexing circuits connected to a second pair of parallel signal paths to which the second pair of the N-bit-parallel low-speed digital signals are outputted from said second splitter respectively form said pair of two of the multiplexing circuits.

7. Optical transmission equipment comprising:

an optical modulation unit including a plurality of optical modulators coupled to an internal optical transmission path; and

an electric circuit unit for generating a plurality of high-speed serial digital signal streams to be supplied to said optical modulation unit,

wherein said electric circuit unit includes;

a plurality of parallel signal paths each for transferring an N-bit-parallel low-speed digital signal stream (N is an integer more than

     1) encoded by an encoder;

a plurality of multiplexing circuits each connected to one of said parallel signal paths to convert the N-bit-parallel low-speed digital signal stream into a high-speed serial digital signal stream to be supplied to said optical modulation unit; and

at least one delay adjustment unit for adjusting delay of the N-bit-parallel low-speed digital signal stream in at least one of said parallel signal paths, with the timing unit of a bit period of the high-speed serial digital signal stream and accurately adjusting the delay within the bit period by controlling the output timing of each bit in the high-speed serial digital signal stream to be outputted from said multiplexing circuit connected to the signal path.

13. Optical transmission equipment comprising:

an optical demodulation unit for converting a multilevel modulated optical signal received from an external optical transmission path into a plurality of electric high-speed serial digital signal streams and outputting the plurality of high-speed serial digital signal streams; and

an electric circuit unit for converting the plurality of high-speed serial digital signal streams received from said optical demodulation unit into a plurality of low-speed digital signal streams and outputting the plurality of low-speed digital signal streams,

wherein said electric circuit unit comprises;

a plurality of parallel signal paths each for transferring an N-bit-parallel digital signal stream (N is an integer more than

     1);

a plurality of demultiplexers each for converting one of said high-speed serial digital signal streams into an N-bit-parallel low-speed digital signal stream and outputting the N-bit-parallel low-speed digital signal stream to one of said parallel signal paths;

a delay control buffer circuit for performing delay adjustment on the N-bit-parallel low-speed digital signal stream, in at least one of said parallel signal paths, with the timing unit of a bit period of the high-speed serial digital signal stream or with a timing unit corresponding to an integral fraction of the bit period and outputting the resultant low-speed digital signal stream; and

at least one decoder for converting the plurality of N-bit-parallel low-speed digital signal streams received from said parallel signal paths into low-speed parallel digital signals in a different code.

14. The optical transmission equipment according to claim 13, wherein said delay control buffer circuit temporarily stores the N-bit-parallel low-speed digital signal stream as logically serially arranged data and outputs stored data beginning at a bit position selected in accordance with a preliminarily specified amount of delay adjustment as delay adjusted N-bit-parallel low-speed digital signal stream to said signal path.

15. The optical transmission equipment according to claim 14, wherein said delay control buffer circuit comprises:

a memory for temporarily storing the N-bit-parallel low-speed digital signal stream as said logically serially arranged data;

a write address generator for generating a write address for the N-bit parallel data;

a register for storing said preliminarily specified amount of delay adjustment; and

a read address generator for generating a read address for the N-bit data to be outputted to said signal path based on the write address outputted from said write address generator and on the amount of delay adjustment stored in said register.

16. The optical transmission equipment according to claim 13,

wherein said electric circuit unit includes, as said decoder, at least one of a decoder for phase modulator, a decoder for multilevel modulation, and a Trellis decoder.

17. An integrated circuit for optical transmission equipment, the integrated circuit comprising:

an encoder for receiving a plurality of N-bit-parallel low-speed digital signal streams (N is an integer more than

     1);

a plurality of parallel signal paths each for transferring one of said N-bit-parallel low-speed digital signal streams outputted from said encoder;

a plurality of multiplexing circuits each for converting the N-bit-parallel low-speed digital signal stream received from one of said parallel signal paths into a high-speed serial digital signal stream to be supplied to an optical modulation unit;

a plurality of delay control buffer circuits each inserted in one of said parallel signal paths to perform delay adjustment on the N-bit-parallel low-speed digital signal stream, with the timing unit of a bit period of the high-speed serial digital signal stream or with a timing unit corresponding to an integral fraction of the bit period and output the resultant delay adjusted digital signal stream; and

means for selectively setting an amount of delay adjustment to each of said delay control buffer circuits.

18. An integrated circuit for optical transmission equipment, the integrated circuit comprising:

a plurality of demultiplexers each for receiving a high-speed serial digital signal stream, converting the received high-speed serial digital signal stream into an N-bit-parallel low-speed digital signal stream (N is an integer more than

     1), and outputting the N-bit-parallel low-speed digital signal stream;

a plurality of parallel signal paths each for transferring the N-bit-parallel low-speed digital signal stream outputted from said demultiplexers;

a plurality of delay control buffer circuits each inserted in one of said parallel signal paths to perform delay adjustment on the N-bit-parallel low-speed digital signal stream, with the timing unit of a bit period of the high-speed serial digital signal stream or with a timing unit corresponding to an integral fraction of the bit period and output the resultant digital signal stream;

a decoder connected to said plurality of parallel signal paths; and

means for selectively setting an amount of delay adjustment to each of the delay control buffer circuits.