POWER SAVING APPARATUS AND METHOD

• US 20060271800A1
• Filed: 04/28/2006
• Published: 11/30/2006
• Est. Priority Date: 05/28/2005
• Status: Active Grant

• Current Assignee: Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. (Hon Hai Precision Industry Co., Ltd.), Hon Hai Precision Industry Co., Ltd.
• Original Assignee: Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. (Hon Hai Precision Industry Co., Ltd.), Hon Hai Precision Industry Co., Ltd.
• Inventors: Hsieh, Kuan-Hong, Li, Jun
• Granted Patent: US 7,562,236 B2
• Time in Patent Office: Days
• US Class Current: 713/300
• CPC Class Codes: G06F 1/3228 Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands

Abstract

A power saving apparatus (20) is interposed between a power supply unit (10) and an electronic device (30). The power saving apparatus includes a switching component (210), a controlling circuit (230) controllable by the electronic device, and a switching circuit (220) controllable by the controlling circuit and the switching component. The controlling circuit receives an “idle” signal from the electronic device and controls the switching circuit to cut off the power supply to the electronic device according to the “idle” signal. The switching component produces an “awakening” signal to control the switching circuit to resume the power supply to the electronic device. A related power saving method is also introduced.

Claims

1. A power saving apparatus being interposed between a power supply unit and an electronic device, the power saving apparatus comprising:

a controlling circuit controllable by the electronic device by using a “

idle”

signals, the “

idle”

signal indicating the electronic device is idle over a time period;

a switching component for producing an “

awakening”

signal; and

a switching circuit under control of the controlling circuit and the switching component, for cutting off or resuming power supply to the electronic device respectively in accordance with the “

idle”

signal, and the “

awakening”

signal.

2. The power saving apparatus according to claim 1, wherein the controlling circuit is further controlled by the electronic device by using a “

normal”

signal, the “

normal”

signal indicating that the electronic device is busy in processing signals or is idle under the time period.

3. The power saving apparatus according to claim 2, wherein the switching circuit is on to maintain the power supply to the electronic device in accordance with the “

normal”

signal.

4. The power saving apparatus according to claim 1, wherein the controlling circuit is a controllable three-terminal switching circuit, of which one terminal is controlled by the electronic device.

5. The power saving apparatus according to claim 4, wherein the controlling circuit is an N-channel MOS having a gate controlled by the electronic device.

6. The power saving apparatus according to claim 5, wherein the switching circuit is in a controllable three-terminal form, of which one terminal is controlled by the controlling circuit and the switching component.

7. The power saving apparatus according to claim 6, wherein the switching circuit is a P-channel MOS having a gate controlled by the N-channel MOS and the switching component.

8. A power saving method applying a power saving apparatus interposed between a power supply unit and an electronic device, the power saving apparatus comprising a controlling circuit, a switching circuit and a switching component, the power saving method comprising:

producing an “

idle”

signal to the controlling circuit if the electronic device remains in an “

idle”

state for over a time period;

controlling the switching circuit to cut off the power supply to the electronic device in accordance with the “

idle”

signal at the controlling circuit;

acting on the switching component to produce an “

awakening”

signal; and

controlling the switching circuit to recover the power supply to the electronic device in accordance with the “

awakening”

signal.

9. The power saving method according to claim 8, further comprising the step of producing a “

normal”

signal to the controlling circuit if the electronic device is in a busy state or in the “

idle”

state under the time period.

10. The power saving method according to claim 9, further comprising the step of controlling the switching circuit to be on to maintain the power supply to the electronic device in accordance with the “

normal”

signal at the controlling unit.

11. The power saving method according to claim 8, wherein the controlling circuit is a controllable three-terminal switching circuit, of which one terminal is controlled by the electronic device.

12. The power saving method according to claim 11, wherein the controlling circuit is an N-channel MOS having a gate controlled by the electronic device.

13. the power saving method according to claim 12,

wherein the switching circuit is in a controllable three-terminal form, of which one terminal is controlled by the controlling circuit.

14. The power saving method according to claim 13, wherein the switching circuit is a P-channel MOS having a gate controlled by the N-channel MOS.