Structure for avalanche improvement of ultra high density trench MOSFET
First Claim
1. A trenched metal oxide semiconductor field effect transistor (MOSFET) cell comprising a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate, wherein said MOSFET cell further comprising:
- a source-body contact trench opened with sidewalls extended substantially vertical relative to a top surface into said source and body regions and filled with contact metal plug; and
a body-resistance-reduction region doped with a body-resistance-reduction-dopant disposed in said body region immediately near said source-body contact trench whereby an avalanche capability of said MOSFET cell is enhanced.
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Accused Products
Abstract
A trenched metal oxide semiconductor field effect transistor (MOSFET) cell that includes a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The MOSFET cell further includes a source-body contact trench opened with sidewalls substantially extend vertically relative to a top surface into the source and body regions and filled with contact metal plug. A body-resistance reduction region doped with body-doped is formed to surround the source-body contact trench to reduce a body-region resistance between the source-body contact metal and the trenched gate to improve an avalanche capability.
39 Citations
31 Claims
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1. A trenched metal oxide semiconductor field effect transistor (MOSFET) cell comprising a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate, wherein said MOSFET cell further comprising:
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a source-body contact trench opened with sidewalls extended substantially vertical relative to a top surface into said source and body regions and filled with contact metal plug; and
a body-resistance-reduction region doped with a body-resistance-reduction-dopant disposed in said body region immediately near said source-body contact trench whereby an avalanche capability of said MOSFET cell is enhanced. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. A method for manufacturing a trenched metal oxide semiconductor field effect transistor (MOSFET) cell comprising a step of forming said MOSFET cell with a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate, the method further comprising:
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covering said MOSFET cell with an insulation layer and applying a contact mask for opening a source-body contact trench with sidewalls substantially perpendicular to a top surface of said insulation layer into said source and body regions; and
forming a body-resistance-reduction region by implanting a body-resistance-reduction-dopant in said body region immediately near said source-body contact trench whereby an avalanche capability of said MOSFET cell is enhanced. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
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Specification