Creating additional phase margin in the open loop gain of a negative feedback amplifier system

• US 20060273771A1
• Filed: 06/03/2005
• Published: 12/07/2006
• Est. Priority Date: 06/03/2005
• Status: Abandoned Application

• Current Assignee: Micrel Incorporated (Microchip Technology Incorporated)
• Original Assignee: Micrel Incorporated (Microchip Technology Incorporated)
• Inventors: Wilson, Paul, van Ettinger, Roel
• Application Number:
  US11/144,899
• Publication Number:
  US 20060273771A1
• Time in Patent Office: Days
• US Class Current: 323/273
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit

Abstract

A low-dropout voltage (LDO) regulator that creates a zero in the open loop gain using a relatively small-sized current control element to divert part of the supplied load current through a “zero” resistor before adding it to the output load. The main part of the output load is passed through a relatively large second current control element, and both the current control elements are controlled by a control signal generated by an error amplifier (e.g., an op-amp). The voltage signal developed across the “zero” resistor mimics the magnitude and phase of a zero in the loop. This voltage signal is added to the loop gain by, for instance, using a bypass capacitor, and the resulting feedback signal is supplied to the error amplifier, which generates a control signal by comparing the feedback signal with a stable reference voltage.

Claims

1. A negative feedback amplifier system comprising:

a first current control element having a first terminal connected to a supply voltage, a control terminal, and a second terminal connected to an output terminal;

an output stabilization circuit including;

a second current control element having a first terminal connected to the voltage supply, a control terminal, and a second terminal, and

a first resistor coupled between the second terminal of the second current control element and the output terminal; and

an amplifier having at least one input terminal coupled to the second terminal of the second current control element, the amplifier also having an output terminal connected to the control terminals of the first and second current control elements.

2. The negative feedback amplifier system according to claim 1, wherein each of the first and second current control elements comprises one of a P-type MOSFET transistor, an N-type MOSFET, a PNP-type bipolar transistor, and an NPN-type bipolar transistor.

3. The negative feedback amplifier system according to claim 2, wherein a ratio of a size of the second transistor to a size of the first transistor is smaller than one.

4. The negative feedback amplifier system according to claim 1, wherein the output stabilization circuit further comprises a high pass filter coupled between the second terminal of the second current control element and the input terminal of the amplifier.

5. The negative feedback amplifier system according to claim 4, further comprising a feedback block coupled between the second terminal of the second current control element and the input terminal of the amplifier.

6. The negative feedback amplifier system according to claim 5, further comprising a summing circuit having at least one input terminal coupled to the high pass filter, to the feedback block, and to and reference voltage source, and an output terminal connected to a first input terminal of the amplifier.

7. The negative feedback amplifier system according to claim 4, wherein the high pass filter comprises a bypass capacitor.

8. A low dropout voltage (LDO) regulator having an input terminal and an output terminal, the LDO regulator comprising:

a first current control element having a first terminal connected to the input terminal, a control terminal, and a second terminal connected to the output terminal;

an output stabilization circuit including;

a second current control element having a first terminal connected to the input terminal, a control terminal, and a second terminal, and

a first resistor coupled between the second terminal of the second current control element and the output terminal; and

an error amplifier having a first input terminal coupled to the output stabilization circuit, a second input terminal connected to a reference voltage source, and an output terminal connected to the control terminals of the first and second current control elements.

9. The LDO regulator according to claim 8, wherein each of the first and second current control elements comprises one of a P-type MOSFET transistor, an N-type MOSFET, a PNP-type bipolar transistor, and an NPN-type bipolar transistor.

10. The LDO regulator according to claim 9, wherein a ratio of a size of the second transistor to a size of the first transistor is smaller than one.

11. The LDO regulator according to claim 8, wherein the output stabilization circuit further comprises a feedback capacitor having a first terminal connected to the second terminal of the second current control element, and a second terminal connected to the first input terminal of the error amplifier.

12. The LDO regulator according to claim 8,

wherein the error amplifier comprises an operational amplifier,

wherein the first input terminal comprises an non-inverting input terminal of the operational amplifier, and

wherein the second input terminal comprises a inverting input terminal of the operational amplifier.

13. A portable device comprising:

a power source for generating an input signal;

a load circuit; and

a voltage regulator having an input terminal connected to the power source and an output terminal connected to the load circuit, wherein the voltage regulator comprises;

a first current control element having a first terminal connected to the input terminal, a control terminal, and a second terminal connected to the output terminal;

an output stabilization circuit including;

a second current control element having a first terminal connected to the input terminal, a control terminal, and a second terminal, and

a first resistor coupled between the second terminal of the second current control element and the output terminal;

an error amplifier having a first input terminal coupled to the output stabilization circuit, a second input terminal connected to a reference voltage source, and an output terminal connected to the control terminals of the first and second current control elements.

14. The portable device according to claim 13, wherein each of the first and second current control elements comprises one of a P-type MOSFET transistor, an N-type MOSFET, a PNP-type bipolar transistor, and an NPN-type bipolar transistor.

15. The portable device according to claim 14, wherein a ratio of a size of the second transistor to a size of the first transistor is smaller than one.

16. The portable device according to claim 13, wherein the output stabilization circuit further comprises a feedback capacitor having a first terminal connected to the second terminal of the second current control element, and a second terminal coupled to the first input terminal of the error amplifier.

17. The portable device according to claim 16, further comprising a feedback block including a first resistor connected in series with a second resistor between the output terminal and a fixed voltage source, wherein a node located between the first and second resistors is connected to the first input terminal of the error amplifier.

18. The portable device according to claim 13,

wherein the error amplifier comprises an operational amplifier,

wherein the first input terminal comprises an non-inverting input terminal of the operational amplifier, and

wherein the second input terminal comprises a inverting input terminal of the operational amplifier.

19. The portable device according to claim 13, wherein the portable device comprises one of a cellular phone, a cordless phone, a pager, a personal digital assistant, a portable personal computer, a camcorder, and a digital camera.

20. The portable device according to claim 13, wherein the load circuit and the voltage regulator are integrally fabricated on a single semiconductor substrate.