Semiconductor thin film manufacturing method, electronic device, and liquid crystal display device

• US 20060273862A1
• Filed: 06/05/2006
• Published: 12/07/2006
• Est. Priority Date: 06/06/2005
• Status: Abandoned Application

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Shimmura, Tadashi
• Application Number:
  US11/446,247
• Publication Number:
  US 20060273862A1
• Time in Patent Office: Days
• US Class Current: 333/24.100
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02496 Layer structure
• CPC Class Codes: H01L 21/02502 consisting of two layers
• CPC Class Codes: H01L 21/02505 consisting of more than two layers
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 27/1281 by using structural features to control crystal growth, e.g. placement of grain filters
• CPC Class Codes: H01L 27/1296 adapted to increase the uniformity of device parameters
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30

Abstract

A semiconductor thin film is manufactured by forming a first foundation layer on a substrate; making recesses in and raised parts on the first foundation layer; forming a second foundation layer on the first foundation layer, the second foundation layer extending over the recesses and raised parts of the first foundation layer, having heat conductivity which is different from heat conductivity of the first foundation layer, and having a flat surface; forming a semiconductor thin film on the second foundation layer; and illuminating energy beams onto the semiconductor thin film, and crystallizing the semiconductor thin film using the recesses and the raised parts of the first foundation layer and a part of the second foundation layer as crystal producing nucleuses.

Claims

1. A method of manufacturing a semiconductor thin film, the method comprising:

forming a first foundation layer on a substrate;

making recesses in and raised parts on the first foundation layer;

forming a second foundation layer on the first foundation layer, the second foundation layer extending over the recesses and raised parts of the first foundation layer, having heat conductivity which is different from thermal conductivity of the first foundation layer, and having a flat surface;

forming a semiconductor thin film on the second foundation layer; and

illuminating energy beams onto the semiconductor thin film, and crystallizing the semiconductor thin film using the recesses and the raised parts of the first foundation layer and a part of the second foundation layer as crystal producing nucleuses.

2. The method of claim 1, wherein a die assembly is pressed onto the first foundation layer in order to make the recesses and the raised parts in and on the first foundation layer, and the die assembly has recesses and raised parts on a surface thereof.

3. The method of claim 1, wherein a coating material is applied onto the recesses and raised parts of the first foundation layer in order to make the second foundation layer, which flattens a surface of the first foundation layer.

4. The method of claim 2, wherein a coating material is applied onto the recesses and raised parts of the first foundation layer in order to make the second foundation layer, which flattens a surface of the first foundation layer.

5. The method of claim 1, wherein the second foundation layer has higher thermal conductivity than thermal conductivity of the first foundation layer, and the raised parts of the first foundation layer and the second foundation layer thereon form the crystal producing nucleuses.

6. The method of claim 1, wherein the second foundation layer has lower thermal conductivity than thermal conductivity of the first foundation layer, and the raised parts of the first foundation layer and the second foundation layer thereon form the crystal producing nucleuses.

7. The method of claim 1, wherein an insulating film of coating type is applied as the second foundation layer.

8. The method of claim 1, wherein an oxide silicon film of coating type is applied as the first foundation layer, and a nitride silicon film of coating type is applied as the second foundation layer.

9. An electronic device comprising:

a substrate;

a foundation formed on the substrate and having a plurality of crystal producing nucleuses arranged in the shape of a matrix; and

transistors using semiconductor thin films as operation regions, the semiconductor thin films being crystalline and provided at the crystal producing nucleuses on the foundation.

10. The electronic device of claim 9, wherein the foundation includes a first foundation layer with raised parts and recesses and a second layer having thermal conductivity different from thermal conductivity of the first foundation layer and extending over the raised parts and recesses of the first layer, and the raised parts and recesses of the first foundation layer constitute the crystal producing nucleuses.

11. The electronic device of claim 10, wherein the second foundation layer has higher thermal conductivity than thermal conductivity of the first foundation layer, and the crystal producing nucleuses are constituted by the raised parts of the first foundation layer and the second layer extending over the first layer.

12. The electronic device of claim 10, wherein the second foundation layer has lower thermal conductivity than thermal conductivity of the first foundation layer, and the crystal producing nucleuses are constituted by the recesses of the first foundation layer and the second foundation layer extending over the first layer.

13. The electronic device of claim 10, wherein a size of each crystal producing nucleus is equal to or smaller than a size of the operation region of the transistor.

14. The electronic device of claim 10, wherein the operation region of the transistor serves as a channel forming region.

15. A liquid crystal display device comprising:

a transparent substrate;

a foundation formed on the transparent substrate and having a plurality of crystal producing nucleuses arranged in the shape of a matrix; and

transistors using semiconductor thin films as channel forming regions, the semiconductor thin films being crystalline and provided at the crystal producing nucleuses on the foundation layer.

16. The liquid crystal display device of claim 15, wherein the foundation includes a first foundation layer having recesses and raised parts and a second foundation layer having thermal conductivity different from thermal conductivity of the first foundation layer and a flat surface;

the second foundation layer extends over the recesses and raised parts of the first foundation layer; and

the recesses and raised parts of the first foundation layer constitute the crystal producing nucleuses.

17. The liquid crystal display device of claim 16, wherein the second foundation layer has higher thermal conductivity than thermal conductivity of the first foundation layer, and the crystal producing nucleuses are constituted by the raised parts of the first foundation layer and the second foundation layer extending over the first foundation layer.

18. The liquid crystal display device of claim 16, wherein the second foundation layer has lower thermal conductivity than thermal conductivity of the first foundation layer, and the crystal producing nucleuses are constituted by the recesses of the first foundation layer and the second foundation layer extending over the first foundation layer.

19. The liquid crystal display device of claim 15, wherein each crystal producing nucleus has a two-dimensional size which is equal to or smaller than a two-dimensional size of the channel forming region of the thin film transistor.

20. The liquid crystal display device of claim 15, further comprising:

vertical scanning lines electrically connected to gate electrodes of the thin film transistor;

horizontal scanning lines connected to one main electrode of the thin film transistor;

pixel electrodes connected to the other main electrode of the thin film transistor;

a common pixel electrode placed to face with the pixel electrodes; and

a liquid crystal enclosed between the pixel electrodes and the common pixel electrode.