Display device, method of manufacturing the same and mask for manufacturing the same

• US 20060274236A1
• Filed: 05/15/2006
• Published: 12/07/2006
• Est. Priority Date: 06/03/2005
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Sang-Gab, Kim, Shi-Yul, Whangbo, Sang-Woo, Chai, Chong-Chul, Kim, Soo-Jin, Yoon, Soo-Wan, Chang, Won-Kie, Lee, Hi-Kuk, Souk, Jun-Hyung
• Granted Patent: US 8,040,444 B2
• Time in Patent Office: Days
• US Class Current: 349/111
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136236 using a grey or half tone lithographic process
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A mask is provided. The mask includes a mask body, a first exposing part and a second exposing part. The first exposing part is on the mask body. The first exposing part includes a first light transmitting portion and second light transmitting portions. The first light transmitting portion exposes a portion of the photoresist film corresponding to the output terminal to a light of a first light amount. The second light transmitting portions exposes an adjacent portion of the photoresist film adjacent to the output terminal to a light of a second light amount smaller than the first light amount. The second exposing part is on the mask body. The second exposing part includes third light transmitting portions for partially exposing the photoresist film corresponding to the storage electrode to a light of a third light amount that is between the first and second light amounts.

Claims

1. A mask for patterning a photoresist film covering a signal input unit having an output terminal and a storage electrode, the mask comprising:

a mask body;

a first exposing part on the mask body, the first exposing part comprising;

a first light transmitting portion for exposing a portion of the photoresist film corresponding to the output terminal to a light of a first light amount; and

a plurality of second light transmitting portions for exposing an adjacent portion of the photoresist film adjacent to the output terminal to a light of a second light amount that is smaller than the first light amount; and

a second exposing part on the mask body, the second exposing part comprising a plurality of third light transmitting portions for exposing a portion of the photoresist film corresponding to the storage electrode to a light of a third light amount that is between the first and second light amounts.

2. The mask of claim 1, wherein each of the second transmitting portions has a closed loop shape which is substantially the same shape as the first light transmitting portion.

3. The mask of claim 1, wherein the third light transmitting portions have a stripe shape, and are spaced apart from each other.

4. A mask for patterning a photoresist film covering a signal input unit having an output terminal and a storage electrode, the mask comprising:

a mask body;

a slit exposing part on the mask body, the slit exposing part comprising a plurality of slits corresponding to the output terminal; and

a translucent part on the mask body for partially removing the photoresist film.

5. The mask of claim 4, wherein each of the slits has a closed loop shape.

6. The mask of claim 4, wherein a wavelength of a light that is irradiated onto the mask is about 436 nm to about 193 nm, and a light transmittance of the translucent part is about 20% to about 70%.

7. A display device comprising:

a storage electrode pattern on a substrate;

a dielectric layer on the storage electrode pattern;

a signal output unit on the dielectric layer, the signal output unit comprising an output terminal that outputs a data signal based on a timing signal;

a dielectric pattern on the dielectric layer, the dielectric pattern having a first contact hole through which the output terminal is partially exposed;

an insulating pattern on the dielectric layer, the signal output unit and the dielectric pattern, the insulating pattern having a second contact hole corresponding to the first contact hole and a third contact hole through which the dielectric pattern corresponding to the storage electrode pattern is partially exposed; and

a pixel electrode electrically connected to the output terminal, the pixel electrode comprising a storage electrode portion corresponding to the storage electrode pattern.

8. The display device of claim 7, wherein the storage electrode pattern comprises a molybdenum pattern and an aluminum pattern on the molybdenum pattern.

9. The display device of claim 7, wherein the output terminal comprises a first molybdenum pattern on the dielectric layer, an aluminum pattern on the first molybdenum pattern and a second molybdenum pattern on the aluminum pattern.

10. The display device of claim 9, further comprising a semiconductor pattern between the dielectric layer and the first molybdenum pattern.

11. The display device of claim 10, wherein the semiconductor pattern comprises a first amorphous silicon pattern including an amorphous silicon and a second amorphous silicon pattern on the first amorphous silicon pattern, and impurities are implanted on the second amorphous silicon pattern at a high concentration.

12. The display device of claim 7, wherein the first contact hole has a first opening of a first area and a second opening having a second area that is smaller than the first area, and a second opening is connected to the first opening.

13. The display device of claim 12, wherein a depth of the second opening is about half of a thickness of the insulating layer.

14. The display device of claim 7, wherein the pixel electrode comprises a transparent electrode.

15. The display device of claim 14, wherein the pixel electrode comprises at least one selected from the group consisting of indium tin oxide, indium zinc oxide and amorphous indium tin oxide.

16. The display device of claim 7, wherein the insulating pattern comprises an organic material and a photoresist material.

17. The display device of claim 7, wherein a width of the third contact hole is smaller than a width of the storage electrode pattern.

18. The display device of claim 7, wherein a width of the third contact hole is not smaller than a width of the storage electrode pattern.

19. A display device comprising:

a storage electrode pattern interposed between a substrate and a dielectric layer on the substrate;

a signal output unit on the dielectric layer, the signal output unit including an output terminal that outputs a data signal based on a timing signal;

a dielectric pattern on the dielectric layer, the dielectric pattern having a first contact hole through which the output terminal is partially exposed and a surface increasing part corresponding to the storage electrode pattern;

an insulating pattern on the dielectric layer, the signal output unit and the dielectric pattern, the insulating pattern having a second contact hole corresponding to the first contact hole and a third contact hole through which the surface increasing part is partially exposed; and

a pixel electrode electrically connected to the output terminal, the pixel electrode including a storage electrode portion on the surface increasing part corresponding to the storage electrode pattern.

20. The display device of claim 19, wherein the surface increasing part comprises a recess.

21. The display device of claim 19, wherein the surface increasing part has a groove shape.

22. The display device of claim 19, wherein the surface increasing part has a wave shape including a plurality of grooves and ridges.

23. The display device of claim 19, wherein the pixel electrode is a transparent electrode.

24. A method of manufacturing a display device comprising:

forming a storage electrode pattern on a substrate;

forming an output terminal to which an image signal is applied on a first dielectric layer that covers the storage electrode pattern;

forming a second dielectric layer and an insulating layer on the first dielectric layer having the output terminal;

patterning the insulating layer and the second dielectric layer so that a portion of the second dielectric layer corresponding to the output terminal is exposed, and a remaining portion of the insulating layer corresponding to the storage electrode pattern remains on a portion of the second dielectric layer corresponding to the storage electrode pattern;

partially removing the exposed second dielectric layer and the remaining portion of the insulating layer to form a first contact hole through which the output terminal is partially exposed and a second contact hole in the second dielectric layer corresponding to the storage electrode pattern; and

forming a pixel electrode on the insulating layer, the pixel electrode being electrically connected to the output terminal through the first contact hole, and corresponding to the storage electrode pattern in the second contact hole.

25. The method of claim 24, wherein the forming of the storage electrode pattern further comprises forming a plurality of gate lines adjacent to the storage electrode pattern.

26. The method of claim 25, after the forming of the first dielectric layer, further comprising:

forming a channel layer on the first dielectric layer, the channel layer corresponding to a gate electrode that is electrically connected to the gate line; and

forming an output terminal that is extended in a direction substantially perpendicular to the gate line, the output terminal being electrically connected to the channel layer.

27. The method of claim 26, wherein the channel layer comprises an amorphous silicon pattern and an impurity doped amorphous silicon pattern on the amorphous silicon pattern.

28. The method of claim 24, wherein a portion of the insulating layer corresponding to the output terminal is exposed to a light of a first light amount and a portion of the insulating layer corresponding to the storage electrode pattern is exposed to a light of a second light amount.

29. The method of claim 24, wherein a thickness of the insulating layer corresponding to the storage electrode pattern is substantially the same as a thickness of the second dielectric layer.

30. The method of claim 24, wherein the remaining portion of the insulating layer corresponding to the storage electrode pattern is removed through an ashing process.

31. The method of claim 24, wherein the insulating layer corresponding to the output terminal has a first opening having a first width and a second opening having a second width that is smaller than the first width.

32. The method of claim 24, wherein the insulating layer has a first opening having a first width and a second opening having a second width that is smaller than the first width.

33. The method of claim 24, wherein the forming of the pixel electrode comprises:

forming a transparent conductive layer on the insulating layer; and

patterning the transparent conductive layer so that the pixel electrode is electrically connected to the output terminal and corresponds to the storage electrode pattern.

34. A method of manufacturing a display device comprising:

forming a first signal maintaining portion between a substrate and a first dielectric layer on the substrate;

forming an output terminal on the first dielectric layer;

forming a second dielectric layer and an insulating layer on the first dielectric layer and the output terminal;

patterning the insulating layer to form a first contact hole through which a portion of the second dielectric layer corresponding to the output terminal is partially exposed and a stepped pattern corresponding to the first signal maintaining portion;

patterning the second dielectric layer to form a second contact hole through which the output terminal is partially exposed and an embossed pattern corresponding to the stepped pattern; and

forming a pixel electrode electrically connected to the output terminal, the pixel electrode comprising a second signal maintaining portion that covers the embossed pattern.

35. The method of claim 34, wherein the display device further comprises a gate line between the substrate and the first dielectric layer adjacent to the first signal maintaining portion.

36. The method of claim 34, wherein the display device further comprises:

a data line on the first dielectric layer; and

a channel layer electrically connected to the output terminal.

37. The method of claim 36, wherein the channel layer comprises an amorphous silicon pattern and an impurity doped amorphous silicon pattern on the amorphous silicon pattern.

38. The method of claim 34, wherein the patterning of the insulating layer further comprises aligning a mask on the insulating layer, and the mask has a plurality of slits corresponding to the stepped pattern.

39. The method of claim 34, wherein the second dielectric layer is patterned using the stepped pattern as an etching mask.

40. The method of claim 39, wherein the stepped pattern is removed from the second dielectric layer having the embossed pattern through an ashing process.

41. A method of manufacturing a display device comprising:

forming a first signal maintaining portion between a substrate and a first dielectric layer on the substrate and an output terminal on the first dielectric layer;

forming a second dielectric layer and an insulating layer on the first dielectric layer and the output terminal;

patterning the insulating layer to form a first contact hole through which a portion of the second dielectric layer corresponding to the output terminal is partially exposed and a plurality of insulating patterns corresponding to the first signal maintaining portion, the insulating patterns having different heights;

patterning the second dielectric layer to form a second contact hole through which the output terminal is partially exposed;

patterning the second and first dielectric layers to form an embossed pattern corresponding to the insulating patterns; and

forming a pixel electrode electrically connected to the output terminal, the pixel electrode comprising a second signal maintaining portion that covers the embossed pattern.

42. The method of claim 41, wherein the patterning of the insulating layer further comprises aligning a mask on the insulating layer, and the mask has a plurality of slits of various widths corresponding to the insulating patterns.

43. The method of claim 41, wherein the second and first dielectric layers are etched using the insulating patterns as an etching mask.

44. The method of claim 41, wherein the insulating patterns are removed from the second dielectric layer having the embossed pattern through an ashing process.

45. A method of manufacturing a display device comprising:

forming a storage electrode pattern, a first dielectric layer covering the storage electrode pattern, an output terminal outputting a data signal, a second dielectric layer covering the output terminal and an insulating layer on the second dielectric layer on a substrate;

aligning a mask including a slit exposing part having a plurality of slits and a translucent part corresponding to the storage electrode pattern on the insulating layer;

patterning the insulating layer and the second dielectric layer using the slit exposing part and the translucent part so that a portion of the second dielectric layer corresponding to the output terminal is exposed, and a remaining portion of the insulating layer corresponding to the storage electrode pattern remains on a portion of the second dielectric layer corresponding to the storage electrode pattern;

partially removing the exposed second dielectric layer and the remaining portion of the insulating layer to form a contact hole through which the output terminal is partially exposed and to expose a portion of the second dielectric layer corresponding to the storage electrode pattern; and

forming a pixel electrode on the insulating layer, the pixel electrode being electrically connected to the output terminal through the contact hole, and corresponding to the storage electrode pattern in the second contact hole.

46. The method of claim 45, wherein a wavelength of a light that is irradiated onto the mask is about 436 nm to about 193 nm, and a light transmittance of the translucent part is about 20% to about 70%.

47. The method of claim 45, wherein the translucent part comprises a chromium oxide layer or a chromium nitride layer.