Probe Card Assembly And Kit

• US 20060279300A1
• Filed: 06/13/2006
• Published: 12/14/2006
• Est. Priority Date: 11/16/1993
• Status: Active Grant

• Current Assignee: FormFactor Incorporated
• Original Assignee: FormFactor Incorporated
• Inventors: Eldridge, Benjamin N., Khandros, Igor Y., Sporck, A. Nicholas
• Granted Patent: US 7,352,196 B2
• Time in Patent Office: Days
• US Class Current: 324/756.30
• CPC Class Codes: B23K 1/0016 Brazing of electronic components
• CPC Class Codes: B23K 20/004 Wire welding
• CPC Class Codes: B23K 2101/40 Semiconductor devices
• CPC Class Codes: C25D 21/02 Heating or cooling
• CPC Class Codes: C25D 5/22 Electroplating combined with mechanical treatment during the deposition
• CPC Class Codes: C25D 5/605 Surface topography of the layers, e.g. rough, dendritic or nodular layers
• CPC Class Codes: G01R 1/06711 Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
• CPC Class Codes: G01R 1/07342 the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
• CPC Class Codes: G01R 1/07364 with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
• CPC Class Codes: G01R 1/07378 using an intermediate adapter, e.g. space transformers G01R1/07371 takes precedence
• CPC Class Codes: G01R 31/2886 Features relating to contacting the IC under test, e.g. probe heads; chucks G01R31/2865 takes precedence, test connections, e.g. test sockets, or probes per se, G01R1/04 or G01R1/06
• CPC Class Codes: H01L 21/4853 Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
• CPC Class Codes: H01L 21/4889 Connection or disconnection of other leads to or from wire-like parts, e.g. wires
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 21/76897 Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step self-aligned silicidation on field effect transistors H01L29/665
• CPC Class Codes: H01L 22/20 Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/1134 Stud bumping, i.e. using a wire-bonding apparatus
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/45014 : Ribbon connectors, e.g. rectangular cross-section
• CPC Class Codes: H01L 2224/45144 : Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48 : of an individual wire connector
• CPC Class Codes: H01L 2224/49109 : outside the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73203 : Bump and layer connectors
• CPC Class Codes: H01L 2224/81801 : Soldering or alloying
• CPC Class Codes: H01L 2224/85201 : Compression bonding
• CPC Class Codes: H01L 2225/0651 : Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06527 : Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06555 : Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
• CPC Class Codes: H01L 2225/06572 : Auxiliary carrier between devices, the carrier having an electrical connection structure
• CPC Class Codes: H01L 23/49811 : Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads H01L23/49827 takes precedence
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/72 : Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 25/0652 : the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/16 : the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0001 : Technical content checked by a classifier
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01045 : Rhodium [Rh]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1532 : the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/206 : Length ranges
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01R 12/52 : connecting to other rigid printed circuits or like structures
• CPC Class Codes: H05K 1/141 : One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters H05K1/142 and H05K1/147 take precedence
• CPC Class Codes: H05K 2201/0397 : Tab forming integral conductive tabs H05K3/4092
• CPC Class Codes: H05K 2201/068 : wherein the coefficient of thermal expansion is important
• CPC Class Codes: H05K 2201/1031 : Surface mounted metallic connector elements
• CPC Class Codes: H05K 2201/10318 : Surface mounted metallic pins
• CPC Class Codes: H05K 2201/10378 : Interposers
• CPC Class Codes: H05K 2201/10719 : Land grid array [LGA]
• CPC Class Codes: H05K 2201/10734 : Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 2201/10757 : Bent leads
• CPC Class Codes: H05K 2201/10878 : Means for retention of a lead in a hole
• CPC Class Codes: H05K 2201/10909 : Materials of terminal, e.g. of leads or electrodes of components
• CPC Class Codes: H05K 2201/10946 : Leads attached onto leadless component after manufacturing the component
• CPC Class Codes: H05K 3/20 : by affixing prefabricated conductor pattern H05K1/187, H05K3/046, H05K3/4658, H05K3/4682 takes precedence
• CPC Class Codes: H05K 3/308 : Adaptations of leads connectors to printed circuits H01R12/00
• CPC Class Codes: H05K 3/326 : the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits H05K3/365 takes precedence
• CPC Class Codes: H05K 3/3421 : Leaded components
• CPC Class Codes: H05K 3/3426 : characterised by the leads
• CPC Class Codes: H05K 3/368 : parallel to each other H05K3/361 takes precedence
• CPC Class Codes: H05K 3/4015 : using auxiliary conductive elements, e.g. pieces of metal foil, metallic spheres
• CPC Class Codes: H05K 3/4092 : Integral conductive tabs, i.e. conductive parts partly detached from the substrate
• CPC Class Codes: H05K 7/1069 : with spring contact pieces
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

In a probe card assembly, a series of probe elements can be arrayed on a silicon space transformer. The silicon space transformer can be fabricated with an array of primary contacts in a very tight pitch, comparable to the pitch of a semiconductor device. One preferred primary contact is a resilient spring contact. Conductive elements in the space transformer are routed to second contacts at a more relaxed pitch. In one preferred embodiment, the second contacts are suitable for directly attaching a ribbon cable, which in turn can be connected to provide selective connection to each primary contact. The silicon space transformer is mounted in a fixture that provides for resilient connection to a wafer or device to be tested. This fixture can be adjusted to planarize the primary contacts with the plane of a support probe card board.

Claims

1-5. -5. (canceled)

6. A method of making a probe card assembly for probing a semiconductor wafer, the method comprising:

providing a probe card having a plurality of first contact terminals;

providing a semiconductor substrate having a plurality of first substrate terminals and second substrate terminals;

providing a plurality of electrical connections connecting selected ones of the plurality of first contact terminals and selected ones of the plurality of first substrate terminals;

providing a plurality of probe elements mounted to the second plurality of substrate terminals; and

providing a movable element that controls an orientation of the substrate with respect to the probe card.

7. The method of claim 6 wherein providing the substrate comprises providing a substrate made of silicon.

8. The method of claim 6 wherein providing the substrate comprises providing a substrate having approximately the same coefficient of thermal expansion as the semiconductor wafer.

9. The method of claim 6 wherein providing the substrate comprises providing second substrate terminals that are spaced apart from each other at a pitch significantly finer than the pitch of the first substrate terminals.

10. The method of claim 6 wherein providing the substrate comprises providing a substrate that is spaced apart from and secured without adhesive to the probe card.

11. The method of claim 6 wherein providing the electrical connections comprises providing resilient electrical connectors.

12. The method of claim 6 wherein providing the electrical connections comprises providing composite electrical connectors.

13. The method of claim 6 wherein providing the electrical connections comprises providing tape automated bonds.

14. The method of claim 6 wherein providing the electrical connections comprises providing a ribbon-like cable.

15. The method of claim 6 wherein providing the electrical connections comprises providing wirebonds.

16. The method of claim 6 wherein providing the probe elements comprises providing resilient connectors.

17. The method of claim 6 wherein providing the probe elements comprises providing composite spring contacts.

18. The method of claim 6 wherein providing the probe elements comprises:

mounting to at least one of the second substrate terminals an elongate core of relatively hard yield strength;

overcoating the core with material of relatively low yield strength.

19. The method of claim 6 wherein providing a movable element comprises providing an interposer.

20. The method of claim 6 wherein providing a movable element comprises providing an interconnection substrate.

21. The method of claim 6 further comprising providing mechanisms for adjusting the orientation of the substrate with respect to the probe card.

22. The method of claim 21 wherein providing the mechanisms comprises providing differential screws coupled to at least one mounting plate.

23. The method of claim 21 wherein providing the mechanisms comprises providing an actuator mechanism coupled to at least one mounting plate.

24. The method of claim 21 providing the mechanisms comprises providing pivot spheres.

25. The method of claim 21 further comprising providing an active device integrated into the semiconductor substrate.

26. The method of claim 6 further comprising providing prefabricated contact tip structures mounted to the ends of the probe elements.

27. The method of claim 6 further comprising providing a rigid backing for the substrate.

28. The method of claim 6 further providing a biasing element for applying a force to the substrate that biases the substrate away from the probe card.

29. The method of claim 28 wherein the biasing element comprises a coil spring.

30. A method of making a probe card assembly comprising:

providing a silicon semiconductor substrate;

mounting a plurality of resilient probe elements on the substrate;

providing a probe card comprising printed circuit board;

providing electrical connections between the substrate and the probe card; and

resiliently linking the semiconductor substrate to the probe card.

31. The method of claim 30 further comprising stacking the substrate on top of an interposer.

32. The method of claim 30 wherein mounting the probe elements comprises electroplating a hard metal material over a soft metal core.

33. The method of claim 30 wherein mounting the probe elements comprises overcoating a gold wire, via electroplating, with a nickel alloy.

34. The method of claim 30 further comprising prefabricating the probe elements for subsequent attachment to the substrate.

35. The method of claim 30 wherein providing the substrate further comprises providing pitch reducing electrical connections within said substrate.

36. A method for temporarily probing a semiconductor wafer, the method comprising:

obtaining a semiconductor wafer having a plurality of surface contacts;

obtaining a probe card assembly comprising;

a probe card having a plurality of elongate probes,

a probe substrate having a coefficient of thermal expansion substantially identical to that of the wafer,

a plurality of resilient electrical connections for connecting the probe card to the wafer via the probe substrate, and

a means for resiliently supporting the substrate; and

urging said semiconductor wafer against the plurality of elongate probes that correspond with said plurality of surface contacts.

37. The method of claim 36 wherein the probes are resilient.

38. The method of claim 36 wherein the probes are composite.

39. The method of claim 36 wherein the probe substrate is silicon.

40. The method of claim 36 wherein said means for supporting the substrate comprises an interposer.

41. The method of claim 36 wherein means for supporting the substrate comprises an interconnection substrate and ribbon-like element.