Source driver controlling slew rate

• US 20060279356A1
• Filed: 05/31/2006
• Published: 12/14/2006
• Est. Priority Date: 05/31/2005
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: An, Chang-Ho
• Granted Patent: US 7,760,199 B2
• Time in Patent Office: Days
• US Class Current: 330/253
• CPC Class Codes: H03F 2203/45471 the CSC comprising one or more extra current sources
• CPC Class Codes: H03F 2203/45506 the CSC comprising only one switch
• CPC Class Codes: H03F 3/45219 Folded cascode stages

Abstract

A source driver employed in a liquid crystal display device uses a slew-rate control signal to regulate a slew rate of its output buffers, which makes an output voltage selectively operable at a low slew rate. Such a source driver can reduce (if not prevent) distortion of a common voltage.

Claims

1. A source driver, of a liquid crystal display device, comprising:

a plurality of output buffers to drive source lines;

a voltage sharing unit to share voltage levels on the source lines during a charge-sharing interval; and

a controller to regulate slew rates of the output buffers in response according to the charge-sharing interval.

2. The source driver as set forth in claim 1, wherein the controller further is operable to generate a slew-rate control signal that is activated after an end of the charge-sharing interval.

3. The source driver as set forth in claim 1, wherein an interval for regulating the slew rates of the output buffers is equal to the charge-sharing interval.

4. The source driver as set forth in claim 1, wherein the voltage sharing unit includes a plurality of sharing switches.

5. The source driver as set forth in claim 4, wherein:

the controller is further operable to generate a sharing-switch control signal; and

the sharing switches are operable according to the sharing-switch control signal.

6. The source driver as set forth in claim 1, wherein:

the controller further is operable to generate a slew-rate control signal; and

the output buffers are operable to selectively exhibit reduced slew rates according to the slew-rate control signal.

7. A source driver, of a liquid crystal display device, comprising:

output buffers to drive source lines;

output switches to regulate output voltages on the source lines;

charge-sharing switches to share voltage levels on the source lines during a charge-sharing interval; and

a control signal generator to provide a slew-rate control signal for regulating slew rates of the output buffers and to provide switching signals for operating the output switches and the charge-sharing switches, in response to an end of the charge-sharing interval.

8. The source driver as set forth in claim 7, wherein the control signal generator comprises at least one of the following:

a switch controller to generate the switching signals so as to include an output-switch control signal and a sharing-switch control signal to regulate the output switches and the charge-sharing switches, respectively; and

a slew-rate controller to generate the slew-rate control signal.

9. The source driver as set forth in claim 8, wherein the output-switch control signal and the sharing-switch control signal are generated with reference to an output enable signal received from an entity external to the source driver.

10. The source driver as set forth in claim 9, wherein the slew-rate control signal is generated in response to the sharing-switch control signal.

11. The source driver as set forth in claim 10, wherein an active time of the slew-rate control signal is at least substantially the same as an active interval of the sharing-switch control signal.

12. The source driver as set forth in claim 7, wherein the output buffers are further separable to selectively exhibit reduced slew rates according to the slew-rate control signal.

13. The source driver as set forth in claim 12, wherein each output buffer comprises:

an input circuit to receive an analogue image signal and the output voltage;

an amplifier circuit to amplify the analogue image signal;

a capacitive circuit to stabilize a frequency characteristic of the output voltage; and

an output circuit to drive the source line in response to signals from the amplifier circuit.

14. The source driver as set forth in claim 13, wherein the input circuit is further operable to control current of a current-source transistor in response to the slew-rate control signal.

15. The source driver as set forth in claim 13, wherein each output buffer is a rail-to-rail operation amplifier.

16. A source driver, of a liquid crystal display device, comprising:

output buffers to drive source lines;

output switches to regulate output voltages of the source lines and currents flowing through the output buffers;

charge-sharing switches to share voltage levels of the source lines during a charge-sharing interval; and

a control signal generator to provide a slew-rate control signal for regulating slew rates of the output buffers and to provide switching signals for operating the output switches and the charge-sharing switches, in response to an end of the charge-sharing time.

17. The source driver as set forth in claim 16, wherein the control signal generator comprises at least one of the following:

a switch controller to generate the switching signals so as to include an output-switch control signal and an sharing-switch control signal to regulate the output switches and the charge-sharing switches, respectively; and

a slew-rate controller to generate the slew-rate control signal so as to adjust output resistance of the output switches.

18. The source driver as set forth in claim 17, wherein the output switches are arranged to selectively adopt serial or parallel interconnection, according to the slew-rate control signal, and so adjust an aggregate resistance which the output switches represent.

19. The source driver as set forth in claim 17, wherein the output-switch control signal and the sharing-switch control signal are generated with reference to an output enable signal received from an entity external to the source driver.

20. The source driver as set forth in claim 19, wherein the slew-rate control signal is generated in response to the sharing-switch control signal.

21. The source driver as set forth in claim 20, wherein an active interval of the slew-rate control signal is at least substantially the same as an active interval of the sharing-switch control signal.

22. The source driver as set forth in claim 16, wherein the output buffers are further operable to respectively exhibit lower slew rates according to the slew-rate control signal.

23. The source driver as set forth in claim 22, wherein each output buffer comprises:

an input circuit to receive an analogue image signal and the output voltage;

an amplifier circuit to amplify the analogue image signal;

a capacitive circuit to stabilize a frequency characteristic of the output voltage; and

an output circuit to drive the source line in response to signals from the amplifier circuit.

24. The source driver as set forth in claim 23, wherein the input circuit is further operable to control current of a current-source transistor in response to the slew-rate control signal.

25. The source driver as set forth in claim 23, wherein each output buffer is a rail-to-rail operation amplifier.

26. A source driver, of a liquid crystal display device, comprising:

output buffers to drive source lines;

output switches to regulate output voltages on the source lines;

charge-sharing switches to share voltage levels on the source lines during a charge-sharing interval; and

a control signal generator to provide control signals for operating the output switches and the charge-sharing switches,

wherein of the output buffers are further operable to exhibit selectively variable slew rates according to a power control signal received from an entity external to the source driver.

27. The source driver as set forth in claim 26, wherein the power control signal is supplied through a low power control pin of an integrated circuit.

28. The source driver as set forth in claim 26, wherein each output buffer comprises:

an input circuit to receive an analogue image signal and the output voltage;

an amplifier circuit to amplify the analogue image signal;

a capacitive circuit to stabilize a frequency characteristic of the output voltage; and

an output circuit to drive the source line in response to signals from the amplifier circuit.

29. The source driver as set forth in claim 28, wherein the input circuit is further operable to control current of a current-source transistor in response to the power control signal.

30. The source driver as set forth in claim 26, wherein each output buffer is a rail-to-rail operation amplifier.

31. The source driver as set forth in claim 26, wherein a default mode of the output buffers is to exhibit lower slew rates relative to selectively invokable higher slew rates.