Method and apparatus for programming an input/output device over a serial bus
First Claim
1. An apparatus for programming a device over a serial bus, comprising:
- a first memory for storing units of a programming sequence, each unit having a command portion and a data portion;
a second memory having a single address; and
a fetching circuit for transferring said programming sequence one unit at a time from said first memory to said second memory; and
a bus control circuit for translating the command portion of each said unit into a serial bus command for use with respect to the corresponding data portion.
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Accused Products
Abstract
A preferred embodiment is an apparatus for programming an input/output device over a serial bus that significantly reduces the burden placed on a host device associated with programming such devices. The preferred embodiment includes (a) a first memory for storing units of a programming sequence, each unit in the programming sequence having a command portion and a data portion; (b) a second memory having a single address; (c) a fetching circuit for transferring the programming sequence one unit at a time from the first memory to the second memory; and (d) a bus control circuit for translating the command portion of each said unit into a serial bus command for use with respect to the corresponding data portion.
31 Citations
20 Claims
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1. An apparatus for programming a device over a serial bus, comprising:
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a first memory for storing units of a programming sequence, each unit having a command portion and a data portion;
a second memory having a single address; and
a fetching circuit for transferring said programming sequence one unit at a time from said first memory to said second memory; and
a bus control circuit for translating the command portion of each said unit into a serial bus command for use with respect to the corresponding data portion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for programming a device over a serial bus, comprising the steps of:
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reading a programming sequence from a first memory one unit at a time, each unit having a command portion and a data portion;
writing each said unit to a second memory at a single address; and
translating the command portion of each said unit into a serial bus command for use with respect to the corresponding data portion. - View Dependent Claims (10, 11, 12, 13, 14)
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15. A graphics display system, comprising:
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a host;
an input/output device;
a first memory for storing units of a programming sequence, each unit having a command portion and a data portion;
a fetching circuit for transferring said programming sequence one unit at a time from said first memory to a second memory at a single address; and
a bus control circuit for translating the command portion of each said unit into a serial bus command for use with respect to the corresponding data portion. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification