Processor circuit and method of allocating a logic chip to a memory chip

• US 20060289658A1
• Filed: 03/06/2006
• Published: 12/28/2006
• Est. Priority Date: 09/04/2003
• Status: Abandoned Application

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Fischer, Wieland, Seifert, Jean-Pierre
• Application Number:
  US11/370,192
• Publication Number:
  US 20060289658A1
• Time in Patent Office: Days
• US Class Current: 235/492
• CPC Class Codes: G06F 21/73 by creating or determining hardware identification, e.g. serial numbers
• CPC Class Codes: G06F 21/79 in semiconductor storage media, e.g. directly-addressable memories
• CPC Class Codes: G06Q 20/341 Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
• CPC Class Codes: G06Q 20/3576 Multiple memory zones on card
• CPC Class Codes: G06Q 20/40975 using encryption therefor
• CPC Class Codes: G07F 7/1008 Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system

Abstract

A processor circuit includes a logic chip with a logic circuit and a non-volatile memory as well as a memory chip with a non-volatile memory. A key is stored in the non-volatile memory of the logic chip by using electronic fuses. Further, personalization information is stored, which signalizes that the logic chip is allocated to a memory chip. A chip identification encrypted with the key is stored in the memory chip at an ID memory area. During starting up the processor, it is first verified whether the encrypted logic chip identification stored in the memory chip is authentic or not. Thereby, a simple and inexpensive personalization of a memory chip to a logic chip can be obtain in order to ward off attacks with regard to the removal or manipulation, respectively, of the memory chip.

Claims

1. A processor circuit comprising:

a logic chip with a logic circuit and a non-volatile memory;

a memory chip with a non-volatile memory;

wherein the non-volatile memory of the logic chip is a memory area wherein a key is stored, and

wherein the non-volatile memory of the memory chip comprises an identification memory area wherein an identification of the logic chip encrypted by using the key is stored; and

wherein the non-volatile memory of the logic chip comprises a further memory area wherein personalization information is stored, indicating in a set state that the logic chip and the memory chip are allocated to each other, and indicating in a non-set state that the logic chip is not allocated to a memory chip.

2. The processor circuit according to claim 1, further comprising:

a carrier on which the logic chip and the memory chip are disposed.

3. The processor circuit according to claim 1,

wherein the non-volatile memory of the logic chip comprises a block with a plurality of electronic fuses that are programmable in an irreversible way.

4. The processor circuit according to claim 3,

wherein at least one electronic fuse is provided for storing the personalization information in the non-volatile memory of the logic chip.

5. The processor circuit according to claim 1,

wherein the non-volatile memory of the memory chip is a non-volatile memory, which is only deletable as a whole.

6. The processor circuit according to claim 1,

wherein the non-volatile memory of the memory chip is a flash memory.

7. The processor circuit according to claim 1,

wherein at least part of the information stored in the memory chip is stored by using a storage key, wherein the storage key can be generated from information from the logic chip.

8. The processor circuit according to claim 7, wherein the memory key is equal to the key or corresponds at least partly to the identification of the logic chip.

9. The processor circuit according to claim 1, wherein the key stored in the non-volatile memory is a random number.

10. The processor circuit according to claim 1,

wherein the memory chip stores data and code.

11. The processor circuit according to claim 1,

wherein the logic chip comprises a CPU.

12. The processor circuit according to claim 2,

wherein the carrier is a circuit board.

13. A method of allocating a logic chip to a logic circuit and a non-volatile memory to a memory chip with a non-volatile memory, comprising the steps of:

providing a key and storing the key in the non-volatile memory of the logic chip;

encrypting an identification of the logic chip by using the key to obtain an encrypted identification; and

storing the encrypted identification of the logic chip in an identification memory area of the non-volatile memory of the memory chip;

storing personalization information in the non-volatile memory of the logic chip, wherein the personalization information indicates in a set state that the logic chip and the memory chip are allocated to each other, and wherein the personalization information indicates in a non-set state that the logic chip is not allocated to a memory chip.

14. The method according to claim 13, wherein the non-volatile memory wherein the key is stored comprises a block with electronic fuses.

15. The method according to claim 13, wherein the step of storing the personalization information in the non-volatile memory of the logic chip is performed after the step of encrypting and storing the encrypted identification in the memory chip.

16. The method according to claim 13, further comprising the steps of:

encrypting information by using an information key to obtain encrypted information; and

storing the encrypted information in the non-volatile memory of the memory chip.

17. The method according to claim 16, wherein the step of storing the personalization information in the non-volatile memory of the logic chip is performed after storing the encrypted information.

18. The method according to claim 13, wherein the non-volatile memory of the logic chip is read out prior to the step of encrypting the identification in order to determine whether the personalization information is already included,

wherein in the case of a positive answer the memory chip is read out, and

wherein in the case when the memory is empty, the steps of providing a key, encrypting an identification and storing the encrypted identification are performed.

19. A method of operating a processor circuit with a logic chip with a logic circuit and a non-volatile memory and a memory chip with an identification memory area and a further memory area, comprising the steps of:

reading out the identification memory area of the logic chip to obtain a read-out result;

reading out the further memory area of the non-volatile memory of the logic chip to obtain a read-out result;

determining whether the read-out result includes personalization information, wherein the personalization information indicates in a set state that the logic chip and the memory chip are allocated to each other, and wherein the personalization information indicates in a non-set state that the logic chip is not allocated to a memory chip; and

verifying that the read-out result is an identification of the logic chip encrypted by using the key stored in the logic chip, only when the personalization information indicates in a set state that the logic chip and the memory chip are allocated to each other;

with a positive result of the step of verifying, enabling further steps, where the logic chip and the memory chip are involved, otherwise taking a security measure.

20. The method according to claim 19, wherein the step of verifying comprises the steps of:

reading out the key from the non-volatile memory of the logic chip;

obtaining an unencrypted identification of the logic chip;

encrypting the unencrypted identification with the key to obtain an encryption result;

comparing the encryption result with the read-out result.

21. The method according to claim 19, wherein in the case where the read-out result comprises the personalization information in a non-set state, the non-volatile memory of the memory chip is read out to take a security measure in a case when the memory is not empty.

22. A computer program with a program code for performing the method of allocating a logic chip to a logic circuit and a non-volatile memory to a memory chip with a non-volatile memory, comprising the steps of:

providing a key and storing the key in the non-volatile memory of the logic chip;

encrypting an identification of the logic chip by using the key to obtain an encrypted identification;

storing the encrypted identification of the logic chip in an identification memory area of the non-volatile memory of the memory chip; and

storing personalization information in the non-volatile memory of the logic chip, wherein the personalization information indicates in a set state that the logic chip and the memory chip are allocated to each other, and wherein the personalization information indicates in a non-set state that the logic chip is not allocated to a memory chip,

when the computer program runs on a computer.

23. A computer program with a program code for performing the method of operating a processor circuit with a logic chip with a logic circuit and a non-volatile memory and a memory chip with an identification memory area and a further memory area, comprising the steps of:

reading out the identification memory area of the logic chip to obtain a read-out result;

reading out the further memory area of the non-volatile memory of the logic chip to obtain a read-out result;

determining whether the read-out result includes personalization information, wherein the personalization information indicates in a set state that the logic chip and the memory chip are allocated to each other, and wherein the personalization information indicates in a non-set state that the logic chip is not allocated to a memory chip; and

verifying that the read-out result is an identification of the logic chip encrypted by using the key stored in the logic chip, only when the personalization information indicates in a set state that the logic chip and the memory chip are allocated to each other;

with a positive result of the step of verifying, enabling further steps, where the logic chip and the memory chip are involved, otherwise taking a security measure,

when the computer program runs on a computer.

24. A processor circuit comprising:

a logic chip with a logic circuit and a non-volatile memory;

a memory chip with a non-volatile memory;

wherein the non-volatile memory of the logic chip is a memory area wherein a key is stored, and

wherein the non-volatile memory of the memory chip comprises an identification memory area wherein an identification of the logic chip encrypted by using the key is stored; and

wherein the non-volatile memory of the logic chip comprises a further memory area wherein personalization information is stored, wherein the logic chip is configured to permit the key and the personalization information to be stored simultaneously.