Steam control device, stream encryption/decryption device, and stream encryption/decryption method

• US 20060291648A1
• Filed: 05/19/2006
• Published: 12/28/2006
• Est. Priority Date: 06/01/2005
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Yanamoto, Kaoru, Sasaki, Takatsuna
• Granted Patent: US 8,064,596 B2
• Time in Patent Office: Days
• US Class Current: 380/37
• CPC Class Codes: H04L 2209/125 Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations
• CPC Class Codes: H04L 2209/60 Digital content management, e.g. content distribution
• CPC Class Codes: H04L 9/065 Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3

Abstract

The present invention provides a stream control device. The device includes a plurality of data processors that sequentially implement processing for stream data. The unit data of processing in each of the data processors has a certain data amount. The stream control device also includes a memory that is provided at a previous stage or a subsequent stage of the data processor, and stores the stream data. Each of the data processors includes a monitoring unit that monitors an amount of data stored in the memories at a previous stage and a subsequent stage of the data processor, and a data retriever that retrieves data to be processed from the memory at the previous stage.

Claims

1. A stream control device comprising:

a plurality of data processors that sequentially implement processing for stream data, unit data of processing in each of the data processors having a certain data amount; and

a memory that is provided at a previous stage or a subsequent stage of the data processor, and stores the stream data;

wherein

each of the data processors includes

a monitoring unit that monitors an amount of data stored in the memories at a previous stage and a subsequent stage of the data processor, and

a data retriever that retrieves data to be processed from the memory at the previous stage, if data is stored in the memory at the previous stage and a free space in the memory at the subsequent stage is equal to or larger than a data amount of unit data of processing in the data processor.

2. A stream encryption/decryption device comprising:

a plurality of encryptor/decryptors that sequentially implement encryption/decryption for stream data, unit data of encryption/decryption in each of the encryptor/decryptors having a certain data amount; and

a memory that is provided at a previous stage or a subsequent stage of the encryptor/decryptor, and stores the stream data;

wherein

each of the encryptor/decryptors includes

a monitoring unit that monitors an amount of data stored in the memories at a previous stage and a subsequent stage of the encryptor/decryptor, and

a data retriever that retrieves data to be encrypted/decrypted from the memory at the previous stage, if data is stored in the memory at the previous stage and a free space in the memory at the subsequent stage is equal to or larger than a data amount of unit data of encryption/decryption in the encryptor/decryptor.

3. The stream encryption/decryption device according to claim 2, wherein

each of the encryptor/decryptors has a substantially fixed processing time period dependent upon an encryption/decryption scheme of the encryptor/decryptor, and transfers retrieved data to the memory at the subsequent stage after elapse of the processing time period.

4. A stream encryption/decryption method for implementing a plurality of times of encryption/decryption for stream data, unit data of each encryption/decryption having a certain data amount, the method comprising:

a first step of monitoring a data amount of data that is to be subjected to Nth (N is an integer) encryption/decryption and is stored in an Nth memory;

a second step of monitoring a data amount of data that has been subjected to the Nth encryption/decryption and is stored in an N+1th memory;

a third step of retrieving data to be encrypted/decrypted from the Nth memory, if data is stored in the Nth memory and a free space in the N+1th memory is equal to or larger than a data amount of unit data of the Nth encryption/decryption; and

a fourth step of implementing the Nth encryption/decryption for the retrieved data.

5. The stream encryption/decryption method according to claim 4, further comprising:

a fifth step of transferring the data for which the Nth encryption/decryption has been implemented to the N+1th memory after elapse of a substantially fixed processing time period of the Nth encryption/decryption, the processing time period depending upon an encryption/decryption scheme of the Nth encryption/decryption.