Device manufacturing method and a calibration substrate

• US 20060292463A1
• Filed: 06/28/2005
• Published: 12/28/2006
• Est. Priority Date: 06/28/2005
• Status: Active Grant

• Current Assignee: ASML Netherlands BV (ASML Holding NV)
• Original Assignee: ASML Netherlands BV (ASML Holding NV)
• Inventors: Friz, Alexander, Consolini, Joseph J., Best, Keith Frank
• Granted Patent: US 7,501,215 B2
• Time in Patent Office: Days
• US Class Current: 430/22
• CPC Class Codes: A41D 2400/00 Functions or special features of garments
• CPC Class Codes: G03F 7/70633 Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
• CPC Class Codes: G03F 9/7003 Alignment type or strategy, e.g. leveling, global alignment
• CPC Class Codes: G03F 9/7011 Pre-exposure scan; original with original holder alignment; Prealignment, i.e. workpiece with workpiece holder
• CPC Class Codes: G03F 9/7019 Calibration
• CPC Class Codes: G03F 9/7084 Position of mark on substrate, i.e. position in (x, y, z) of mark, e.g. buried or resist covered mark, mark on rearside, at the substrate edge, in the circuit area, latent image mark, marks in plural levels
• CPC Class Codes: G03F 9/7088 Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection

Abstract

The present invention relates to a device manufacturing method wherein a plurality of front side marks are manufactured on the front side of the substrate. These marks are used to locally align the substrate when exposing. After certain processing steps, the positions of the front side marks are measured and compared with respect to their original positions. The measured position changes of the front side marks, i.e. their behaviour, can then be analyzed. The original positions and actual positions are defined with respect to a nominal grid which is defined using global alignment marks which are positioned at the back side of the substrate. Because the global alignment marks are positioned at the back side, they are not affected by any processing step.

Claims

1. A device manufacturing method comprising:

measuring positions of global alignment marks present on a substrate having a front side and a back side, wherein said global alignment marks are positioned at the back side of said substrate;

defining a nominal grid on the front side of said substrate using said measured positions of said global alignment marks;

manufacturing a plurality of front side marks on the front side of the substrate;

measuring first positions of said respective front side marks with respect to said nominal grid, resulting in original positions of the respective front side marks;

executing at least one manufacturing step using said front side marks for alignment;

measuring second positions of said respective front side marks with respect to said nominal grid, resulting in actual positions of the respective front side marks; and

calculating measured position changes of said front side marks using said original positions and said actual positions.

2. A device manufacturing method according to claim 1, further comprising:

making substrate vectors plots by translating each of said measured position changes into a vector.

3. A device manufacturing method according to claim 1, further comprising:

collecting front side mark identification information and said measured position changes into a data-set;

defining bad marks as being those front side marks having measured position changes larger than a predefined threshold;

removing said bad marks for said data-set rendering a limited data-set; and

aligning a patterning device to said substrate using said limited data-set.

4. A device manufacturing method according to claim 2, further comprising:

analyzing substrate vector plots of consecutively processed substrates;

adjusting settings of a Chemical Mechanical Polishing device used to polish said substrates.

5. A method of manufacturing a calibration substrate, comprising:

providing a transparent substrate;

—

providing a mask layer on a front side of the transparent substrate;

patterning said mask layer to render a patterned mask layer on said front side of the transparent substrate;

providing a resist layer on a back side of the transparent substrate;

exposing said resist layer on said back side of the transparent substrate with light falling on said front side of the transparent substrate and transmitted by said transparent substrate to render an exposed resist layer; and

developing said exposed resist layer to render a patterned resist layer on said back side of the transparent substrate.

6. A method according to claim 5, wherein said patterned resist layer on said back side of the transparent substrate has holes, said method further comprising:

filling said holes with a predetermined material;

removing said patterned resist layer.

7. A method according to claim 5, further comprises:

providing holes on the back side of said transparent substrate using said patterned resist layer as a mask; and

filling said holes with a predetermined material.

8. A method according to claim 5, further comprising patterning a beam using a mask with an orientation independent pattern.

9. A method according to claim 8, wherein said patterned beam comprises UV radiation.