SOLID-STATE IMAGING DEVICE

• US 20070001098A1
• Filed: 06/22/2006
• Published: 01/04/2007
• Est. Priority Date: 07/01/2005
• Status: Active Grant

• Current Assignee: 138 East LCD Advancements Limited (Vector Capital Corporation)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Sano, Takafumi
• Granted Patent: US 7,692,702 B2
• Time in Patent Office: Days
• US Class Current: 250/208.100
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H04N 25/531 by controlling rolling shutters in CMOS SSIS
• CPC Class Codes: H04N 25/616 involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
• CPC Class Codes: H04N 25/767 Horizontal readout lines, multiplexers or registers

Abstract

A solid-state imaging device includes a substrate, a sensor cell array disposed on the substrate, the sensor cell array having a plurality of sensor cells arranged in a matrix, a plurality of signal lines for transferring an image signal output from each of the sensor cells, a plurality of amplifiers connected to at least one of the signal lines, each of the amplifiers including a first capacitance having a first end connected to one of the signal lines, an inversion amplifier having an input end connected to a second end of the first capacitance, a second capacitance connected between the input end and an output end of the inversion amplifier, a switch connected between the input and output ends of the inversion amplifier to reset the second capacitance and a third capacitance having a first end connected to a control line and a second end connected to the input end of the inversion amplifier, and a control voltage supply circuit for supplying one of first and second voltages to the control line.

Claims

1. A solid-state imaging device, comprising:

a substrate;

a sensor cell array disposed on the substrate, the sensor cell array having a plurality of sensor cells arranged in a matrix;

a plurality of signal lines for transferring an image signal output from each of the sensor cells;

a plurality of amplifiers connected to at least one of the signal lines, each of the amplifiers including a first capacitance having a first end connected to one of the signal lines, an inversion amplifier having an input end connected to a second end of the first capacitance, a second capacitance connected between the input end and an output end of the inversion amplifier, a switch connected between the input and output ends of the inversion amplifier to reset the second capacitance and a third capacitance having a first end connected to a control line and a second end connected to the input end of the inversion amplifier; and

a control voltage supply circuit for supplying one of first and second voltages to the control line.

2. The solid-state imaging device according to claim 1, wherein each of the amplifiers is disposed for each of the signal lines, whereas the control voltage supply circuit comprises a single unit for supplying a control voltage to all of the amplifiers.

3. The solid-state imaging device according to claim 1, wherein each of the sensor cells outputs first and second pixel signals of different levels.

4. The solid-state imaging device according to claim 3, wherein each of the sensor cells has a charge accumulation region for transferring a light-generated charge based on an incident light to output a pixel signal based on the light-generated charge accumulated in the region, and outputs a pixel signal after a reset of the light-generated charge in the region and a pixel signal based on the light-generated charge accumulated in the region.

5. The solid state imaging device according to claim 3, wherein the sensor cells comprise one of CMOS sensors and substrate modulation sensors.

6. The solid-state imaging device according to claim 1, wherein the control voltage supply circuit supplies 0V as the first voltage and a power supply voltage as the second voltage.

7. The solid-state imaging device according to claim 6, wherein the control voltage supply circuit is comprised of an inverter.

8. The solid-state imaging device according to claim 1, wherein the control voltage supply circuit switches one of the first and second voltages in response to a reset of the second capacitance.

9. The solid-state imaging device according to claim 1, wherein the inversion amplifier is comprised of an operational amplifier.

10. The solid-state imaging device according to claim 1, wherein the inversion amplifier is comprised of a source-grounded transistor.

11. The solid-state imaging device according to claim 1, wherein each of the sensor cells outputs first and second pixel signals of different levels, and the control voltage supply circuit supplies only one of the first and second voltages when the second pixel signal is input at a high level after the first signal has been input at a low level.

12. The solid-state imaging device according to claim 1, wherein the inversion amplifier is comprised of an inverter.

13. The solid-state imaging device according to claim 1, wherein each of the sensor cells outputs first and second pixel signals of different levels, and the control voltage supply circuit supplies only one of the first and second voltages when the first pixel signal is input at a low level after the second pixel signal has been input at a high level.

14. The solid-state imaging device according to claim 1, wherein the third capacitance is comprised of a capacitance of a periphery of a capacitance formation region including a formation region of the sensor cell array.