Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates

• US 20070001247A1
• Filed: 04/07/2005
• Published: 01/04/2007
• Est. Priority Date: 12/07/2000
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Huibers, Andrew, Patel, Satyadev, Chiang, Steve
• Granted Patent: US 7,573,111 B2
• Time in Patent Office: Days
• US Class Current: 257/414
• CPC Class Codes: B81B 2201/042 Micromirrors, not used as optical switches
• CPC Class Codes: B81B 7/0077 Other packages not provided for in groups B81B7/0035 - B81B7/0074
• CPC Class Codes: B81C 1/00214 Processes for the simultaneaous manufacturing of a network or an array of similar microstructural devices
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: B81C 1/00896 Temporary protection during separation into individual elements
• CPC Class Codes: B81C 1/00904 Multistep processes for the separation of wafers into individual elements not provided for in groups B81C1/00873 - B81C1/00896
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: G02B 26/0833 the reflecting element being a micromechanical device, e.g. a MEMS mirror, DMD G02B26/0825 takes precedence; micromechanical devices in general B81B
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01018 Argon [Ar]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01039 : Yttrium [Y]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01054 : Xenon [Xe]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01072 : Hafnium [Hf]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12036 : PN diode
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from contamination, physical contact, or other deleterious external events. Without additional changes to the MEMS structure between release and wafer bonding and singulation, except for an optional stiction treatment, the MEMS device is best protected and overall process flow is improved. The method is applicable to the production of any MEMS device and is particularly beneficial in the making of fragile micromirrors.

Claims

1. A projection system, comprising:

a light source;

a spatial light modulator comprising a mirror array having a rectangular active area and a plurality of mirrors;

optics through which light passes when mirrors are in their ON state;

wherein light from the light source is directed at an angle perpendicular to an edge of the active area;

wherein the mirrors are disposes such that their edges are neither parallel nor perpendicular to the edges of the active area;

wherein the mirrors have a switching axis perpendicular to the incident light beam, and wherein the mirrors have edges that are not perpendicular to the incident light beam;

wherein the spatial light modulator further comprises a semiconductor substrate and a transparent substrate bonded together with a gap therebetween in which the mirrors are disposed; and

a lower packaging substrate to which the silicon substrate is bonded.

2. The projection system of claim 1, further comprising a lubricant within the gap.

3. The projection system of claim 2, further comprising a getter within the gap.

4. The projection system of claim 3, further comprising a light blocking mask formed as a rectangular frame around the mirror array.

5. The projection system of claim 4, wherein an edge of the transparent substrate is disposed offset from an edge of the silicon substrate and defining a ledge on the semiconductor substrate.

6. The projection system of claim 5, wherein the transparent substrate is glass.

7. The projection system of claim 6, wherein the light blocking mask is disposed on an underside of the glass substrate.

8. The projection system of claim 7, wherein the ledge on the semiconductor substrate comprises bond wires bonded thereto.

9. The projection system of claim 8, wherein the semiconductor substrate is a silicon substrate.

10. The projection system of claim 8, wherein the gap between the glass and silicon substrates is defined in part by an intermediate wafer bonded between the glass and silicon substrates.

11. The projection system of claim 9, wherein a group of the mirror edges of the mirrors are neither parallel nor perpendicular to the edges of the active area, and another group of the edges are parallel to active area edges.

12. The projection system of claim 10, wherein the mirror edges are approximately 45 degrees relative to the active area edges.

13. The projection system of claim 1, wherein no mirror edges are parallel or perpendicular to the edges of the active area.

14. The projection system of claim 13, wherein each mirror has a switching axis that is at a non-parallel and non-perpendicular angle to at least one edge of the mirror.

15. The projection system of claim 14, wherein each mirror has a switching axis parallel to at least one edge of the active area.

16. The projection system of claim 13, wherein each mirror has a switching axis at an angle of from 40 to 55 degrees to one or more edges of each mirror.

17. The projection system of claim 1, wherein each mirror has a front edge that is non-perpendicular to any edge of the active area.

18. The projection system of claim 1, wherein each mirror is a square mirror having four edges defining the square mirror, wherein the four edges of each mirror is neither parallel nor perpendicular to any edges of the active area.

19. The projection system of claim 18, wherein addressing rows connect to every other mirror.

20. The projection system of claim 18, wherein addressing columns connect to every other mirror.

21. The projection system of claim 16, wherein hinges are disposed below each mirror and are held on support posts.

22. The projection system of claim 21, wherein the mirrors comprise hinges that extend parallel to the leading and trailing edges of the active area.

23. The projection system of claim 1, wherein the mirrors have jagged edges.

24. The projection system of claim 9, wherein the mirrors are formed, along with circuitry and electrodes, on the silicon substrate.

25. The projection system of claim 24, wherein at least one of the getter, lubricant and mask are formed on the glass substrate.

26. The projection system of claim 24, wherein the substrates are bonded together with an adhesive.

27. The projection system of claim 26, wherein the adhesive is an epoxy.

28. The projection system of claim 27, wherein the epoxy is a UV cure epoxy.

29. The projection system of claim 27, wherein the getter is a particle getter.

30. The projection system of claim 27, wherein the getter is a moisture getter.

31. The projection system of claim 27, wherein the getter is a combination getter.

32. The projection system of claim 30, wherein the lubricant is an organic lubricant.

33. The projection system of claim 32, wherein the number of mirrors in the mirror array is from 6,000 to about 6 million.

34. The projection system of claim 1, wherein the light source is an arc lamp.

35. The projection system of claim 1, which provides a viewed image on a television.

36. The projection system of claim 1, which provides a viewed image on a computer.

37. The projection system of claim 1, wherein a rectangular image is formed by being projected on a surface and is comprised of pixels in the image, the pixels having edges that are non-parallel to the edges of the rectangular projected image on the surface.

38. The projection system of claim 37, wherein the pixels in the projected image have pixel edges that are at angles of from 35 to 85 degrees relative to the edges of the rectangular projected image.