System and method for configuring direct current converter

• US 20070002600A1
• Filed: 06/29/2005
• Published: 01/04/2007
• Est. Priority Date: 06/29/2005
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: SigmaTel Incorporated (NXP Semiconductors NV)
• Inventors: May, Marcus
• Granted Patent: US 7,508,686 B2
• Time in Patent Office: Days
• US Class Current: 363/147
• CPC Class Codes: G11C 5/141 Battery and back-up supplies
• CPC Class Codes: H02J 2207/20 Charging or discharging characterised by the power electronics converter

Abstract

A method and system to determine a battery mode of an integrated circuit device are presented. The battery mode is selected with respect to first and second direct current to direct current converter devices within the integrated circuit. A voltage is received at a single pin of the device. A battery mode is determined for the device based on the received voltage, and at least one of the direct current to direct current converter circuits is configured based on the determined battery mode.

Claims

1. An integrated circuit comprising:

a plurality of pins;

a first direct current to direct current converter arranged in a first selectable configuration corresponding to a selected battery mode determined in response to an input received at one of the plurality of pins; and

a second direct current to direct current converter arranged in a second selectable configuration based on the selected battery mode;

wherein the selected battery mode is selected from at least three different available battery modes.

2. The integrated circuit of claim 1, wherein the selected battery mode is selected from four available battery modes.

3. The integrated circuit of claim 2, wherein the available battery modes includes a lithium ion battery mode, an alkaline battery mode, and a double A battery mode.

4. The integrated circuit of claim 3, wherein the available battery modes further includes a second lithium ion battery mode.

5. The integrated circuit of claim 1, wherein when the selected battery mode is a first mode, the first selectable configuration is a first buck configuration and the second selectable configuration is a second buck configuration, and when the selected battery mode is a second mode, the first selectable configuration is the first buck configuration and the second selectable configuration is a boost configuration.

6. The integrated circuit of claim 5, wherein the first buck configuration comprises a first transistor coupled to a battery and coupled to a first inductor, and a second transistor coupled to the first transistor and coupled to ground.

7. The integrated circuit of claim 6, wherein the second buck configuration comprises a third transistor coupled to the battery and coupled to a second inductor, a fourth transistor coupled to the second inductor and coupled to ground, wherein the second inductor is coupled to an output voltage.

8. The integrated circuit of claim 5, wherein the boost configuration comprises a first transistor coupled to an output voltage and coupled to an inductor, wherein the inductor is coupled to a battery, and a second transistor coupled to the inductor and coupled to ground.

9. The integrated circuit of claim 1, wherein the at least three different available battery modes are identified by at least three digital bit values derived from an input applied to the one of the plurality of pins.

10. The integrated circuit of claim 9, wherein the at least three different available battery modes include a first mode associated with a lithium ion battery, the first mode detected when the input is at a low voltage level.

11. The integrated circuit of claim 10, wherein the at least three different available battery modes includes a fourth mode associated with a single series double A battery, the fourth mode detected when the input is at a high voltage level.

12. The integrated circuit of claim 11, wherein the at least three different available battery modes includes a second mode detected by a first intermediate voltage level and a third mode detected by a second intermediate voltage level.

13. The integrated circuit of claim 12, wherein the second mode corresponds to a series coupled double A battery.

14. The integrated circuit of claim 1, further comprising a battery mode detection module coupled to the one of the plurality of pins to receive an input voltage.

15. The integrated circuit of claim 14, wherein the battery mode detection module includes a comparator that is powered down in two of the battery modes to conserve power.

16. A method of selecting a battery mode with respect to a first direct current to direct current converter circuit configuration and a second direct current to direct converter current circuit configuration within an integrated circuit, the method comprising:

receiving a voltage at a single pin of the integrated circuit;

determining a battery mode based on the voltage received at the single pin, the battery mode selected from one of at least three different battery modes; and

configuring at least one of the direct current to direct current converter circuit configurations based on the selected battery mode.

17. The method of claim 16, further comprising placing the first direct current to direct current converter circuit in a first configuration and placing the second direct current to direct current converter circuit in a second configuration, wherein the first and second configurations are selected based on the selected battery mode.

18. The method of claim 17, wherein the selected battery mode is identified by a two bit digital value that identifies one of four available battery modes.

19. The method of claim 18, further comprising comparing the voltage received at the single pin to a target voltage and determining the selected battery mode at least partially based on the comparison.

20. The method of claim 19, further comprising determining the battery mode using logic elements coupled to an output of a comparator.

21. A method of determining a battery mode, comprising:

sensing an impedance value at a detection pin, wherein the impedance value is representative of a battery mode;

comparing the voltage across the impedance value to a reference voltage;

providing a multibit output based on the impedance value and the comparison.