Semiconductor device having ferroelectric film as gate insulating film and manufacturing method thereof

• US 20070004049A1
• Filed: 06/29/2006
• Published: 01/04/2007
• Est. Priority Date: 06/30/2005
• Status: Abandoned Application

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Nasu, Hayato, Usui, Takamasa, Shibata, Hideki
• Application Number:
  US11/476,596
• Publication Number:
  US 20070004049A1
• Time in Patent Office: Days
• US Class Current: 438/3
• CPC Class Codes: H01L 29/495 the conductor material next to the insulator being a simple metal, e.g. W, Mo H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/516 with at least one ferroelectric layer
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/7881 Programmable transistors with only two possible levels of programmation H01L29/7888 takes precedence

Abstract

A semiconductor device includes a gate insulating film which at least includes a first insulating film formed on the main surface of a semiconductor substrate and a first ferroelectric film formed on the first insulating film, containing a compound of a preset metal element and a constituent element of the first insulating film as a main component and having a dielectric constant larger than that of the first insulating film, a gate electrode formed on the gate insulating film and containing one of Cu and a material containing Cu as a main component, and source and drain regions separately formed in the semiconductor substrate to sandwich the gate electrode.

Claims

1. A semiconductor device comprising:

a gate insulating film which includes at least a first insulating film formed on the main surface of a semiconductor substrate and a first ferroelectric film formed on the first insulating film, containing a compound of a preset metal element and a constituent element of the first insulating film as a main component and having a dielectric constant larger than that of the first insulating film,

a gate electrode formed on the gate insulating film and formed of one of Cu and a material containing Cu as a main component, and

source and drain regions separately formed in the semiconductor substrate to sandwich the gate electrode.

2. The semiconductor device according to claim 1, wherein the gate insulating film further includes a second insulating film between the semiconductor substrate and the first insulating film.

3. The semiconductor device according to claim 1, further comprising spacers formed on side walls of the gate electrode, the spacers including first spacer insulating films formed on the semiconductor substrate and the side walls of the gate electrode, and second ferroelectric films formed on interfaces between the gate electrode and the first spacer insulating films, containing a compound of a preset metal element and a constituent element of the first spacer insulating film as a main component and having a dielectric constant larger than that of the first spacer insulating film.

4. The semiconductor device according to claim 3, wherein each of the spacers further includes a second spacer insulating film formed on the first spacer insulating film, a third spacer insulating film formed on the second spacer insulating film and formed of the same insulating material as that of the first spacer insulating film, and a fourth spacer insulating film formed on the third spacer insulating film and formed of the same insulating material as that of the second spacer insulating film.

5. The semiconductor device according to claim 1, further comprising silicide layers formed on the source and drain regions, an inter-level insulating film formed to cover the gate electrode, spacers and silicide layers, and a contact wiring formed in the inter-level insulating film and electrically connected to one of the source and drain regions.

6. The semiconductor device according to claim 3, wherein the preset metal element contains at least one element selected from a group consisting of Mn, Nb, Zr, Cr, V, Y, Tc and Re, the first insulating film and first spacer insulating film contain an O element and at least one element selected from a group consisting of Si, C and F, and the first and second ferroelectric films contain a material selected from a group consisting of α

_xO_y, α

_xSi_yO_z, α

_xC_yO_z and α

_xF_yO_z as a main component, α

indicating the preset metal element.

7. A semiconductor device comprising:

a gate insulating film which at least includes a first insulating film formed on the main surface of a semiconductor substrate and a first ferroelectric film formed on the first insulating film, containing a compound of a preset metal element and a constituent element of the first insulating film as a main component and having a dielectric constant larger than that of the first insulating film,

a floating electrode formed on the gate insulating film and formed of one of Cu and a material containing Cu as a main component,

source and drain regions separately formed in the semiconductor substrate to sandwich the floating electrode,

a gate-gate insulating film which at least includes a second insulating film formed on the floating electrode and a second ferroelectric film formed on the second insulating film, containing a compound of a preset metal element and a constituent element of the second insulating film as a main component and having a dielectric constant larger than that of the second insulating film, and

a control electrode formed on the gate-gate insulating film and formed of one of Cu and a material containing Cu as a main component.

8. The semiconductor device according to claim 7, wherein the gate-gate insulating film further includes a third ferroelectric film formed on an interface between the floating electrode and the second insulating film, containing a compound of a preset metal element and a constituent element of the first spacer insulating film as a main component and having a dielectric constant larger than that of the second insulating film.

9. The semiconductor device according to claim 7, further comprising spacers formed on the floating electrode and side walls of the control electrode, the spacers including first spacer insulating films formed on the semiconductor substrate, floating electrode and the side walls of the control electrode, and third ferroelectric films formed on interfaces between the floating electrode and the first spacer insulating films, containing a compound of a preset metal element and a constituent element of the first spacer insulating film as a main component and having a dielectric constant larger than that of the first spacer insulating film.

10. The semiconductor device according to claim 9, further comprising fourth ferroelectric films formed on interfaces between the control electrode and the first spacer insulating films, containing a compound of a preset metal element and a constituent element of the first spacer insulating film as a main component and having a dielectric constant larger than that of the first spacer insulating film.

11. The semiconductor device according to claim 9, wherein each of the spacers further includes a second spacer insulating film formed on the first spacer insulating film, a third spacer insulating film formed on the second spacer insulating film and formed of the same insulating material as that of the first spacer insulating film, and a fourth spacer insulating film formed on the third spacer insulating film and formed of the same insulating material as that of the second spacer insulating film.

12. The semiconductor device according to claim 7, further comprising silicide layers formed on the source and drain regions, an inter-level insulating film formed to cover the gate electrode, spacers and silicide layers, and a contact wiring formed in the inter-level insulating film and electrically connected to one of the source and drain regions.

13. The semiconductor device according to claim 10, wherein the preset metal element contains at least one element selected from a group consisting of Mn, Nb, Zr, Cr, V, Y, Tc and Re, the first and second insulating films and first spacer insulating film contain an O element and at least one element selected from a group consisting of Si, C and F, and the first to fifth ferroelectric films contain a material selected from a group consisting of α

_xO_y, α

_xSi_yO_z, α

_xC_yO_z and α

_xF_yO_z as a main component, α

indicating the preset metal element.

14. A method of manufacturing a semiconductor device comprising:

forming a first insulating film on the main surface of a semiconductor substrate,

forming a dummy gate on the insulating film,

doping impurity into the semiconductor substrate to form source and drain regions with the dummy gate used as a mask,

forming spacer insulating films on side walls-of the dummy gate,

removing the dummy gate to form an opening which exposes the surface of the first insulating film,

forming an electrode layer which contains a preset metal element and contains Cu as a main component in the opening, and

performing heat treatment to form a first ferroelectric film which contains a compound of the preset metal element and a constituent element of the first insulating film as a main component and having a dielectric constant larger than that of the first insulating film on an interface between the first insulating film and the electrode layer in a self-alignment fashion.

15. The method of manufacturing a semiconductor device according to claim 14, wherein the forming the electrode layer includes:

forming a second insulating film in the opening along the electrode layer, and

forming an alloy film which contains a preset metal element and contains Cu as a main component in the opening along the second insulating film,

the heat treatment including forming a second ferroelectric film which contains a compound of the preset metal element and a constituent element of the second insulating film as a main component and has a dielectric constant larger than that of the second insulating film on an interface between the second insulating film and the alloy film in a self-alignment fashion.

16. The method of manufacturing a semiconductor device according to claim 14, wherein the heat treatment includes forming a second ferroelectric film which contains a compound of the preset metal element and a constituent element of the spacer insulating film as a main component and has a dielectric constant larger than that of the spacer insulating film on an interface between the spacer insulating film and the electrode layer in a self-alignment fashion.

17. The method of manufacturing a semiconductor device according to claim 14, wherein the heat treatment includes forming a reaction film obtained as a result of reaction between an excessive portion of the preset metal element and the outside air on the surface of the electrode layer.