TECHNIQUE FOR EVALUATING A FABRICATION OF A DIE AND WAFER
First Claim
1. A test structure for evaluating a fabrication of a wafer, the test structure comprising:
- a combination of device and interconnect elements that are provided on an active region of a die on the wafer prior to the fabrication of the wafer being completed, wherein the combination can be activated to cause electrical activity that is detectable without affecting a usability of the die or wafer and wherein the combination of device and interconnect elements is configured so that the electrical activity (i) emphasizes a first fabrication step in the fabrication sequence over another step in the fabrication sequence, and (ii) indicates a value or variation of an attribute or result of the first fabrication step on at least a segment of the die.
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Accused Products
Abstract
The fabrication of the wafer may be analyzed starting from when the wafer is in a partially fabricated state. The value of a specified performance parameter may be determined at a plurality of locations on an active area of a die of the wafer. The specified performance parameter is known to be indicative of a particular fabrication process in the fabrication. Evaluation information may then be obtained based on a variance of the value of the performance parameter at the plurality of locations. This may be done without affecting a usability of a chip that is created from the die. The evaluation information may be used to evaluate how one or more processes that include the particular fabrication process that was indicated by the performance parameter value was performed.
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Citations
23 Claims
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1. A test structure for evaluating a fabrication of a wafer, the test structure comprising:
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a combination of device and interconnect elements that are provided on an active region of a die on the wafer prior to the fabrication of the wafer being completed, wherein the combination can be activated to cause electrical activity that is detectable without affecting a usability of the die or wafer and wherein the combination of device and interconnect elements is configured so that the electrical activity (i) emphasizes a first fabrication step in the fabrication sequence over another step in the fabrication sequence, and (ii) indicates a value or variation of an attribute or result of the first fabrication step on at least a segment of the die. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification