Trenched MOSFET termination with tungsten plug structures

• US 20070004116A1
• Filed: 01/12/2006
• Published: 01/04/2007
• Est. Priority Date: 06/06/2005
• Status: Abandoned Application

• Current Assignee: M-Mos Semiconductor Sdn. Bhd.
• Original Assignee: M-Mos Semiconductor Sdn. Bhd.
• Inventors: Hshieh, Fwu-Iuan
• Application Number:
  US11/332,593
• Publication Number:
  US 20070004116A1
• Time in Patent Office: Days
• US Class Current: 438/197
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/48624 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48655 Nickel (Ni) as principal constituent
• CPC Class Codes: H01L 2224/48724 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48755 Nickel (Ni) as principal constituent
• CPC Class Codes: H01L 2224/4903 Connectors having different sizes, e.g. different diameters
• CPC Class Codes: H01L 2224/49051 Connectors having different shapes
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/73221 Strap and wire connectors
• CPC Class Codes: H01L 2224/83801 Soldering or alloying
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 24/26 Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/40 of an individual strap connector
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 29/41766 : with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/456 : on silicon
• CPC Class Codes: H01L 29/66727 : with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 : with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7811 : with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 : with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01018 : Argon [Ar]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/20755 : larger or equal to 50 microns less than 60 microns
• CPC Class Codes: H01L 2924/2076 : equal to or larger than 100 microns
• CPC Class Codes: H01L 2924/30105 : Capacitance

Abstract

A metal oxide semiconductor field effect transistor (MOSFET) device includes a termination area. The termination area has a trenched gate runner electrically connected to a trenched gate of said MOSFET. The MOSFET further includes a gate runner contact trench opened through an insulation layer covering the gate runner and into a gate dielectric filling in the trenched gate runner and the gate runner contact trench filled with a gate runner contact plug. The gate runner contact plug further includes a tungsten contact plug. The gate runner contact plug further includes a tungsten contact plug surrounded by a TiN/Ti barrier layer. The gate runner has a width narrower than one micrometer. The MOSFET further includes a field plate in electric contact with the gate runner contact plug. The gate dielectric filling in the trenched gate runner includes a gate polysilicon filling in the trenched gate runner in the termination area. The gate runner contact plug has a bottom portion extends through the insulation layer into the gate dielectric whereby contact areas are increased with the contact plug contacting the gate dielectric to reduce a gate contact resistance.

Claims

1. A metal oxide semiconductor field effect transistor (MOSFET) device comprising a termination area including a trenched gate runner electrically connected to a trenched gate of said MOSFET, said MOSFET further comprising:

a gate runner contact trench opened through an insulation layer covering said gate runner and into a gate dielectric filling in said trenched gate runner and said gate runner contact trench filled with a gate runner contact plug.

2. The MOSFET device of claim 1 wherein:

said gate runner contact plug further comprising a tungsten contact plug.

3. The MOSFET device of claim 1 wherein:

said gate runner contact plug further comprising a tungsten contact plug surrounded by a TiN/Ti barrier layer.

4. The MOSFET device of claim 1 wherein:

said gate runner having a width narrower than one micrometer.

5. The MOSFET device of claim 1 further comprising:

a field plate in electric contact with said gate runner contact plug.

6. The MOSFET device of claim 1 wherein:

said gate dielectric filling in said trenched gate runner comprising a gate polysilicon filling in said trenched gate runner in said termination area.

7. The MOSFET device of claim 1 wherein:

said gate runner contact plug having a bottom portion extend through said insulation layer into said gate dielectric whereby contact areas are increased with said contact plug contacting said gate dielectric to reduce a gate contact resistance.

8. The MOSFET device of claim 1 further comprising:

a high concentration source dopant region disposed below said trenched gate for reducing a drain to source resistance Rds.

9. The MOSFET device of claim 1 further comprising:

a high concentration source dopant region disposed in said termination area next to a body dopant region in said termination area electrically connected to said body region for inducing an avalanche in a N-P junction interfacing between said high concentration source dopant region and said body dopant region in said termination area whereby a field plate is not required.

10. A method for manufacturing a metal oxide semiconductor field effect transistor (MOSFET) device with a termination area formed with a trenched gate runner electrically connected to a trenched gate of said MOSFET, said method further comprising:

opening a gate runner contact trench through an insulation layer covering said gate runner and into a gate dielectric filling in said trenched gate runner; and

filling said gate runner contact trench with a gate runner contact plug.

11. The method of claim 10 wherein:

said step of filling said gate runner contact trench with a gate runner contact plug further comprising a step of filling said gate runner contact trench with a tungsten contact plug.

12. The method of claim 10 wherein:

said step of filling said gate runner contact trench with a gate runner contact plug further comprising a step of filling said gate runner contact trench with a tungsten contact plug and surrounding said tungsten contact plug with a Ti/TiN barrier layer.

13. The method of claim 10 wherein:

said step of forming said trenched gate runner in said termination area further comprising a step of forming said gate runner with a width narrower than one micrometer.

14. The method of claim 10 further comprising:

forming and patterning a field plate in electric contact with said gate runner contact plug in said termination area.

15. The method of claim 10 wherein:

said step of filling said trenched gate runner with said gate dielectric comprising a step of filling said trenched gate runner in said termination area with a gate polysilicon.

16. The method of claim 10 wherein:

said step of filling said trench gate runner with said gate runner contact plug further comprising a step of filling said trenched gate runner with a bottom portion of said gate runner contact plug extending through said insulation layer into said gate dielectric whereby contact areas are increased with said contact plug contacting said gate dielectric to reduce a gate contact resistance.

17. The method of claim 10 further comprising:

forming a high concentration source dopant region below said trenched gate for reducing a drain to source resistance Rds.

18. The method of claim 10 further comprising:

forming a high concentration source dopant region in said termination area next to a body dopant region in said termination area electrically connected to said body region for inducing an avalanche in a N-P junction interfacing between said high concentration source dopant region and said body dopant region in said termination area whereby a field plate is not required.

19. The method of claim 10 further comprising:

forming a high concentration source dopant region below said trenched gate and trenched gate runner for reducing a drain to source resistance Rds and a high concentration source dopant region in said termination area; and

applying a p-well mask in implanting p-body dopant ions to form a p-body dopant region next to and electrically connected to said high concentration source dopant region for inducing an avalanche in a N-P junction interfacing between said high concentration source dopant region and said body dopant region in said termination area whereby a field plate is not required.

20. A five-mask manufacturing process for manufacturing a power semiconductor device comprising:

applying a trench mask for opening a plurality of gate trenches and a gate runner trench in a termination area followed by processes for forming trenched gate and trenched gate runner then a body implant and diffusion to form body regions;

applying a body implant mask to form body regions with a body ring region in said termination area and applying a source implant mask for forming source regions followed by forming an overlying insulation layer;

applying a contact trench mask to form contact trenches through said overlying insulation layer for opening source contact trenches, gate contact trenches and a gate runner contact trench in said termination area followed by filling said contact trenches with contact trench plugs and depositing a metal layer on a top surface of said insulation layer; and

applying a metal mask for patterning said metal layer into a field plate above said body ring region in said termination area and a source metal in electrical contact with said gate runner contact plug and said source contact plugs respectively.