Semiconductor device and manufacturing method thereof

• US 20070004125A1
• Filed: 06/12/2006
• Published: 01/04/2007
• Est. Priority Date: 06/30/2005
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Maruyama, Junya, Watanabe, Yasuko, Moriya, Yoshitaka
• Granted Patent: US 7,727,859 B2
• Time in Patent Office: Days
• US Class Current: 438/239
• CPC Class Codes: H01L 21/76882 Reflowing or applying of pressure to better fill the contact hole
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 23/16 Fillings or auxiliary members in containers or encapsulations, e.g. centering rings H01L23/42, H01L23/552 take precedence
• CPC Class Codes: H01L 23/3192 Multilayer coating
• CPC Class Codes: H01L 23/49833 the chip support structure consisting of a plurality of insulating substrates
• CPC Class Codes: H01L 23/4985 Flexible insulating substrates H01L23/49572 and H01L23/49855 take precedence
• CPC Class Codes: H01L 23/564 Details not otherwise provided for, e.g. protection against moisture getters H01L23/26
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1262 with a particular formation, treatment or coating of the substrate
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/19041 being a capacitor
• CPC Class Codes: Y10S 438/928 Front and rear surface processing
• CPC Class Codes: Y10S 438/959 Mechanical polishing of wafer
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

It is an object of the present invention to provide a semiconductor device in which a barrier property is improved; a compact size, a thin shape, and lightweight are achieved; and flexibility is provided. By providing a stacked body including a plurality of transistors in a space between a pair of substrates, a semiconductor device is provided, in which a harmful substance is prevented from entering and a barrier property is improved. In addition, by using a pair of substrates which are thinned by performing grinding and polishing, a semiconductor device is provided, in which a compact size, a thin shape, and lightweight are achieved. Further, a semiconductor device is provided, in which flexibility is provided and a high-added value is achieved.

Claims

1. A semiconductor device comprising:

a transistor over a first substrate;

a first insulating layer over the transistor;

a conductive layer electrically connected to a source or a drain of the transistor through an opening provided in the first insulating layer;

a second insulating layer over the conductive layer; and

a second substrate over the second insulating layer,

wherein a thickness of each of the first substrate and the second substrate is 100 μ

m or less.

2. The semiconductor device according to claim 1, wherein at least one of the first substrate and the second substrate is a glass substrate.

3. The semiconductor device according to claim 1, wherein at least one of a sealing material and a spacer is provided between the first substrate and the second substrate.

4. A semiconductor device comprising:

a transistor over a first substrate;

a first insulating layer over the transistor;

a first conductive layer electrically connected to a source or a drain of the transistor through an opening provided in the first insulating layer;

a second insulating layer over the first conductive layer;

a second conductive layer electrically connected to the first conductive layer through an opening provided in the second insulating layer;

a third insulating layer over the second conductive layer; and

a second substrate over the third insulating layer,

wherein a thickness of each of the first substrate and the second substrate is 100 μ

m or less.

5. The semiconductor device according to claim 4, wherein at least one of the first substrate and the second substrate is a glass substrate.

6. The semiconductor device according to claim 4, wherein at least one of a sealing material and a spacer is provided between the first substrate and the second substrate.

7. A semiconductor device comprising:

a transistor including a semiconductor layer, a first insulating layer, and a first conductive layer over one surface of a first substrate;

a second insulating layer over the transistor;

a second conductive layer electrically connected to a source or a drain of the transistor through an opening provided in the second insulating layer;

a first terminal portion electrically connected to the first conductive layer or the second conductive layer;

a third insulating layer over the second insulating layer and the second conductive layer;

a second substrate over the third insulating layer;

a third substrate;

a third conductive layer over one surface of the third substrate;

a second terminal portion electrically connected to the third conductive layer; and

a fourth conductive layer over the other surface of the first substrate,

wherein the fourth conductive layer is electrically connected to the first terminal portion through an opening provided in the first substrate, the first insulating layer and the second insulating layer;

wherein the second terminal portion is electrically connected to the fourth conductive layer;

wherein the other surface of the first substrate and one surface of the third substrate are provided so as to be opposed to each other;

wherein the first terminal portion and the second terminal portion are overlapped with each other; and

wherein a thickness of each of the first substrate and the second substrate is 100 μ

m or less.

8. The semiconductor device according to claim 7, wherein at least one of the first substrate and the second substrate is a glass substrate.

9. The semiconductor device according to claim 7, wherein at least one of a sealing material and a spacer is provided between the first substrate and the second substrate.

10. The semiconductor device according to claim 7, wherein the second terminal portion is electrically connected to the fourth conductive layer through at least one of an anisotropic conductive layer and a bump.

11. A semiconductor device comprising:

a transistor including a semiconductor layer, a first insulating layer, and a first conductive layer over one surface of a first substrate;

a second insulating layer over the transistor;

a second conductive layer electrically connected to a source or a drain of the transistor through an opening provided in the second insulating layer;

a first terminal portion electrically connected to the first conductive layer or the second conductive layer;

a third insulating layer over the second insulating layer and the second conductive layer;

a second substrate which is provided so that one surface of the second substrate is in contact with the third insulating layer;

a third substrate;

a third conductive layer over one surface of the third substrate;

a second terminal portion electrically connected to the third conductive layer; and

a fourth conductive layer over the other surface of the second substrate,

wherein the fourth conductive layer is electrically connected to the first terminal portion through an opening provided in the second substrate and the third insulating layer;

wherein the second terminal portion is electrically connected to the fourth conductive layer;

wherein the other surface of the second substrate and one surface of the third substrate are provided so as to be opposed to each other;

wherein the first terminal portion and the second terminal portion are overlapped with each other; and

wherein a thickness of each of the first substrate and the second substrate is 100 μ

m or less.

12. The semiconductor device according to claim 11, wherein at least one of the first substrate and the second substrate is a glass substrate.

13. The semiconductor device according to claim 11, wherein at least one of a sealing material and a spacer is provided between the first substrate and the second substrate.

14. The semiconductor device according to claim 11, wherein the second terminal portion is electrically connected to the fourth conductive layer through at least one of an anisotropic conductive layer and a bump.

15. A method for manufacturing a semiconductor device, comprising the steps of:

forming a transistor over one surface of a first substrate;

forming a first insulating layer over the transistor;

forming a conductive layer electrically connected to a source or a drain of the transistor through an opening provided in the first insulating layer;

forming a second insulating layer over the conductive layer;

providing a second substrate over the second insulating layer so that the surface of the second insulating layer is in contact with one surface of the second substrate;

thinning the other surface of the first substrate and the other surface of the second substrate until a thickness of each of the first substrate and the second substrate becomes 100 μ

m or less; and

forming a stacked body including the first substrate, the transistor, and the second substrate by cutting the first substrate, the first insulating layer, the second insulating layer, and the second substrate.

16. The method for manufacturing a semiconductor device according to claim 15, wherein at least one of a sealing material and a spacer is formed between the first substrate and the second substrate.

17. A method for manufacturing a semiconductor device, comprising the steps of:

forming a transistor over one surface of a first substrate;

forming a first insulating layer over the transistor;

forming a first conductive layer electrically connected to a source or a drain of the transistor through an opening provided in the first insulating layer;

forming a second insulating layer over the first conductive layer;

forming a second conductive layer electrically connected to the first conductive layer through an opening provided in the second insulating layer;

forming a third insulating layer over the second conductive layer;

providing a second substrate over the third insulating layer so that the surface of the third insulating layer is in contact with one surface of the second substrate;

thinning the other surface of the first substrate and the other surface of the second substrate until a thickness of each of the first substrate and the second substrate becomes 100 μ

m or less; and

forming a stacked body including the first substrate, the transistor, and the second substrate by cutting the first substrate, the first insulating layer, the second insulating layer, the third insulating layer and the second substrate.

18. The method for manufacturing a semiconductor device according to claim 17, wherein at least one of a sealing material and a spacer is formed between the first substrate and the second substrate.

19. A method for manufacturing a semiconductor device, comprising the steps of:

forming a transistor including a semiconductor layer, a first insulating layer, and a first conductive layer over one surface of a first substrate;

forming a second insulating layer over the transistor;

forming a second conductive layer electrically connected to a source or a drain of the transistor through an opening provided in the second insulating layer and a first terminal portion electrically connected to the second conductive layer;

forming a third insulating layer over the second insulating layer, the second conductive layer, and the first terminal portion;

providing a second substrate over the third insulating layer so that the surface of the third insulating layer is in contact with one surface of the second substrate;

thinning the other surface of the first substrate and the other surface of the second substrate until a thickness of each of the first substrate and the second substrate becomes 100 μ

m or less;

forming a third conductive layer overlapping with the first terminal portion over the other surface of the first substrate;

forming an opening which exposes the first terminal portion and filling the opening with the third conductive layer by irradiating the third conductive layer with a laser beam; and

providing a third substrate so that the other surface of the first substrate and one surface of the third substrate provided with a second terminal portion and a fourth conductive layer are opposed to each other, and the third conductive layer and the second terminal portion are electrically connected to each other.

20. The method for manufacturing a semiconductor device according to claim 19, wherein at least one of a sealing material and a spacer is formed between the first substrate and the second substrate.

21. A method for manufacturing a semiconductor device, comprising the steps of:

forming a transistor including a semiconductor layer, a first insulating layer, and a first conductive layer over one surface of a first substrate;

forming a second insulating layer over the transistor;

forming a second conductive layer electrically connected to a source or a drain of the transistor through an opening provided in the second insulating layer and a first terminal portion provided electrically connected to the second conductive layer;

forming a third insulating layer over the second insulating layer, the second conductive layer, and the first terminal portion;

providing a second substrate over the third insulating layer so that the surface of the third insulating layer is in contact with one surface of the second substrate;

thinning the other surface of the first substrate and the other surface of the second substrate until a thickness of each of the first substrate and the second substrate becomes 100 μ

m or less;

forming a third conductive layer overlapping with the first terminal portion over the other surface of the second substrate;

forming an opening which exposes the first terminal portion and filling the opening with the third conductive layer by irradiating the third conductive layer with a laser beam; and

providing a third substrate so that the other surface of the second substrate and one surface of the third substrate provided with a second terminal portion and a fourth conductive layer are opposed to each other, and the third conductive layer and the second terminal portion are electrically connected to each other.

22. The method for manufacturing a semiconductor device according to claim 21, wherein at least one of a sealing material and a spacer is formed between the first substrate and the second substrate.