Efficient network communications via directed processor interrupts

• US 20070005742A1
• Filed: 06/30/2005
• Published: 01/04/2007
• Est. Priority Date: 06/30/2005
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Eldar, Avigdor, Connor, Patrick, Mualem, Avraham
• Application Number:
  US11/172,741
• Publication Number:
  US 20070005742A1
• Time in Patent Office: Days
• US Class Current: 709/223
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked
• CPC Class Codes: H04L 67/10 in which an application is distributed across nodes in the network software deployment G06F8/60; multiprogramming arrangements G06F9/46
• CPC Class Codes: H04L 69/321 Interlayer communication protocols or service data unit [SDU] definitions; Interfaces between layers

Abstract

A method of receiving packets over a network interface and queuing the packets onto a receive queue containing packets to be processed by more than one processor is described. The method includes selecting a particular one of the processors to interrupt when the receive queue is to be processed. Related systems and methods are also described and claimed.

Claims

1. A method comprising:

receiving a plurality of packets over one network interface;

queuing each packet of the plurality of packets onto one receive queue, the receive queue to contain packets to be processed on a plurality of processors of a multiprocessor system;

selecting a first processor from among the plurality of processors; and

interrupting the first processor.

2. The method of claim 1, further comprising:

separating the plurality of packets on the receive queue into a plurality of disjoint subsets through operations performed by the first processor; and

scheduling a callback to process each disjoint subset of the plurality of disjoint subsets;

wherein

at least one callback is to be executed by a second, different processor of the plurality of processors.

3. The method of claim 1, wherein selecting a first processor comprises:

counting a number of packets on the receive queue that are to be processed by each of the plurality of processors; and

selecting a processor that is to process a greatest number of packets as the first processor.

4. The method of claim 1, wherein selecting a first processor comprises:

calculating a total size in bytes of packets on the receive queue that are to be processed by each of the plurality of processors; and

selecting a processor that is to process a greatest number of bytes as the first processor.

5. The method of claim 1, wherein selecting a first processor comprises:

counting a number of packets of a predetermined type on the receive queue that are to be processed by each of the plurality of processors; and

selecting a processor that is to process a greatest number of packets of the predetermined type as the first processor.

6. The method of claim 1, wherein selecting the first processor comprises:

separating the plurality of packets on the receive queue into a plurality of disjoint subsets;

determining a size of each of the plurality of subsets; and

selecting as the first processor a processor that is to process a largest subset of the plurality of subsets.

7. A method comprising:

detecting a new network connection;

selecting one of a plurality of network interfaces to support the new network connection; and

establishing the new network connection over the selected one of the plurality of network interfaces;

wherein

the plurality of network interfaces form a load-sharing team; and

each network interface of the plurality of network interfaces is to interrupt one of a distinct subset of a plurality of processors if the network interface receives a data packet.

8. The method of claim 7 wherein selecting one of the plurality of network interfaces comprises:

using a receive-side scaling (RSS) hash of an outgoing packet to select one of the plurality of network interfaces.

9. The method of claim 7 wherein establishing the new network connection over the selected one of the plurality of network interfaces comprises:

responding to an address resolution protocol (ARP) request with a hardware address of the selected one of the plurality of network interfaces.

10. A machine-readable medium containing instructions that, when executed by a programmable machine, cause the programmable machine to perform operations comprising:

calculating a hash value for each packet of a plurality of packets;

maintaining a queue to contain the plurality of packets;

selecting a processor from among a plurality of processors of a multiprocessor system; and

interrupting the selected processor.

11. The machine-readable medium of claim 10, containing instructions to cause the programmable machine to perform operations comprising:

counting a number of packets of the plurality of packets that are to be processed by each processor of the plurality of processors;

wherein

selecting a processor is selecting a processor that is to process a largest number of packets.

12. The machine-readable medium of claim 10, containing instructions to cause the programmable machine to perform operations comprising:

calculating a size in bytes of the plurality of packets that are to be processed by each processor of the plurality of processors;

wherein

selecting a processor is selecting a processor that is to process a largest number of bytes.

13. The machine-readable medium of claim 10, containing instructions to cause the programmable machine to perform operations comprising:

counting a number of packets of a predetermined type among of the plurality of packets that are to be processed by each processor of the plurality of processors;

wherein

selecting a processor is selecting a processor that is to process a largest number of packets of the predetermined type.

14. A system comprising:

a plurality of processors; and

a network interface having a plurality of receive queues;

wherein

each receive queue is associated with a plurality of processors; and

the network interface is to interrupt a selected one of the plurality of processors associated with a receive queue if at least one packet is on the receive queue.

15. The system of claim 14 further comprising an interrupt service routine (ISR) to process a receive queue, wherein:

processing the receive queue comprises assigning each packet on the receive queue to one of the plurality of processors; and

scheduling a callback to cause an assigned processor of the plurality of processors to process the packet.

16. The system of claim 14, further comprising selection logic to track a contents of a receive queue and to select a processor of the plurality of processors.

17. The system of claim 16 wherein the selection logic comprises:

a counter to count a number of packets on the receive queue that are to be processed by each one of the plurality of processors; and

a selector to select a one of the plurality of processors that is to process a largest number of packets on the receive queue.